snapshot: sagernet/gvisor v0.0.0-20250811.0-sing-box-mod.1
Содержимое пина, зафиксированного в go.mod sing-box-lx, одним коммитом без истории. Полная история SagerNet/gvisor — 1.45 ГБ и клонируется в каждой CI-джобе; наша дельта — одна вставка в одну функцию, история для неё не нужна. Module path github.com/sagernet/gvisor сохранён намеренно: на него опирается replace-директива суперпроекта. Патч поверх — отдельным коммитом, чтобы дельта читалась одним git show и переносилась на новый пин копированием. SPECS/TASKS/048-GVISOR_HANDSHAKE_NIL_CRASH
This commit is contained in:
Leadaxe
commit
2c4ae3b0a4
712 changed files with 185689 additions and 0 deletions
590
pkg/abi/nvgpu/classes.go
Normal file
590
pkg/abi/nvgpu/classes.go
Normal file
|
|
@ -0,0 +1,590 @@
|
|||
// Copyright 2023 The gVisor Authors.
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
package nvgpu
|
||||
|
||||
import (
|
||||
"fmt"
|
||||
)
|
||||
|
||||
// ClassID is a client class ID, in the sense of
|
||||
// src/nvidia/src/kernel/rmapi/resource_desc.h:RS_RESOURCE_DESC::externalClassID.
|
||||
//
|
||||
// +marshal
|
||||
type ClassID uint32
|
||||
|
||||
// String implements fmt.Stringer.String.
|
||||
func (id ClassID) String() string {
|
||||
// Include leading zeroes for easier searchability, both here and in
|
||||
// g_allclasses.h.
|
||||
return fmt.Sprintf("0x%08x", uint32(id))
|
||||
}
|
||||
|
||||
// IsRootClient returns true if the given class ID is a root client class.
|
||||
func (id ClassID) IsRootClient() bool {
|
||||
switch id {
|
||||
case NV01_ROOT, NV01_ROOT_NON_PRIV, NV01_ROOT_CLIENT:
|
||||
return true
|
||||
default:
|
||||
return false
|
||||
}
|
||||
}
|
||||
|
||||
// Class IDs, from src/nvidia/generated/g_allclasses.h.
|
||||
const (
|
||||
NV01_ROOT = 0x00000000
|
||||
NV01_ROOT_NON_PRIV = 0x00000001
|
||||
NV01_CONTEXT_DMA = 0x00000002
|
||||
NV01_EVENT = 0x00000005
|
||||
NV01_MEMORY_SYSTEM = 0x0000003e
|
||||
NV01_MEMORY_LOCAL_PRIVILEGED = 0x0000003f
|
||||
NV01_MEMORY_LOCAL_USER = 0x00000040
|
||||
NV01_ROOT_CLIENT = 0x00000041
|
||||
NV_MEMORY_EXTENDED_USER = 0x00000042
|
||||
NV01_MEMORY_VIRTUAL = 0x00000070
|
||||
NV01_MEMORY_SYSTEM_OS_DESCRIPTOR = 0x00000071
|
||||
NV01_EVENT_OS_EVENT = 0x00000079
|
||||
NV01_DEVICE_0 = 0x00000080
|
||||
NV_SEMAPHORE_SURFACE = 0x000000da
|
||||
RM_USER_SHARED_DATA = 0x000000de
|
||||
NV_MEMORY_FABRIC = 0x000000f8
|
||||
NV_MEMORY_MULTICAST_FABRIC = 0x000000fd
|
||||
NV_MEMORY_MAPPER = 0x000000fe
|
||||
NV20_SUBDEVICE_0 = 0x00002080
|
||||
NV2081_BINAPI = 0x00002081
|
||||
NV50_P2P = 0x0000503b
|
||||
NV50_THIRD_PARTY_P2P = 0x0000503c
|
||||
NV50_MEMORY_VIRTUAL = 0x000050a0
|
||||
GT200_DEBUGGER = 0x000083de
|
||||
FERMI_TWOD_A = 0x0000902d
|
||||
FERMI_CONTEXT_SHARE_A = 0x00009067
|
||||
GF100_DISP_SW = 0x00009072
|
||||
GF100_ZBC_CLEAR = 0x00009096
|
||||
GF100_PROFILER = 0x000090cc
|
||||
GF100_SUBDEVICE_MASTER = 0x000090e6
|
||||
FERMI_VASPACE_A = 0x000090f1
|
||||
KEPLER_CHANNEL_GROUP_A = 0x0000a06c
|
||||
NVENC_SW_SESSION = 0x0000a0bc
|
||||
KEPLER_INLINE_TO_MEMORY_B = 0x0000a140
|
||||
VOLTA_USERMODE_A = 0x0000c361
|
||||
TURING_USERMODE_A = 0x0000c461
|
||||
TURING_CHANNEL_GPFIFO_A = 0x0000c46f
|
||||
NVB8B0_VIDEO_DECODER = 0x0000b8b0 // Hopper
|
||||
NVC4B0_VIDEO_DECODER = 0x0000c4b0 // Turing
|
||||
NVC6B0_VIDEO_DECODER = 0x0000c6b0 // Ampere
|
||||
NVC7B0_VIDEO_DECODER = 0x0000c7b0 // Ampere
|
||||
NVC9B0_VIDEO_DECODER = 0x0000c9b0 // Ada
|
||||
NVCDB0_VIDEO_DECODER = 0x0000cdb0 // Blackwell
|
||||
NVC4B7_VIDEO_ENCODER = 0x0000c4b7
|
||||
NVC7B7_VIDEO_ENCODER = 0x0000c7b7
|
||||
NVC9B7_VIDEO_ENCODER = 0x0000c9b7
|
||||
AMPERE_CHANNEL_GPFIFO_A = 0x0000c56f
|
||||
TURING_A = 0x0000c597
|
||||
TURING_DMA_COPY_A = 0x0000c5b5
|
||||
TURING_COMPUTE_A = 0x0000c5c0
|
||||
HOPPER_USERMODE_A = 0x0000c661
|
||||
BLACKWELL_USERMODE_A = 0x0000c761
|
||||
AMPERE_A = 0x0000c697
|
||||
AMPERE_DMA_COPY_A = 0x0000c6b5
|
||||
AMPERE_COMPUTE_A = 0x0000c6c0
|
||||
AMPERE_DMA_COPY_B = 0x0000c7b5
|
||||
AMPERE_COMPUTE_B = 0x0000c7c0
|
||||
HOPPER_CHANNEL_GPFIFO_A = 0x0000c86f
|
||||
HOPPER_DMA_COPY_A = 0x0000c8b5
|
||||
BLACKWELL_CHANNEL_GPFIFO_A = 0x0000c96f
|
||||
BLACKWELL_DMA_COPY_A = 0x0000c9b5
|
||||
BLACKWELL_CHANNEL_GPFIFO_B = 0x0000ca6f
|
||||
BLACKWELL_DMA_COPY_B = 0x0000cab5
|
||||
ADA_A = 0x0000c997
|
||||
ADA_COMPUTE_A = 0x0000c9c0
|
||||
NV_CONFIDENTIAL_COMPUTE = 0x0000cb33
|
||||
HOPPER_A = 0x0000cb97
|
||||
HOPPER_SEC2_WORK_LAUNCH_A = 0x0000cba2
|
||||
HOPPER_COMPUTE_A = 0x0000cbc0
|
||||
BLACKWELL_INLINE_TO_MEMORY_A = 0x0000cd40
|
||||
BLACKWELL_A = 0x0000cd97
|
||||
BLACKWELL_COMPUTE_A = 0x0000cdc0
|
||||
BLACKWELL_B = 0x0000ce97
|
||||
BLACKWELL_COMPUTE_B = 0x0000cec0
|
||||
)
|
||||
|
||||
// From src/common/sdk/nvidia/inc/class/cl0000.h:
|
||||
const (
|
||||
NV01_NULL_OBJECT = 0x0
|
||||
)
|
||||
|
||||
// NV2081_ALLOC_PARAMETERS is the alloc params type for NV2081_BINAPI, from
|
||||
// src/common/sdk/nvidia/inc/class/cl2081.h.
|
||||
//
|
||||
// +marshal
|
||||
type NV2081_ALLOC_PARAMETERS struct {
|
||||
Reserved uint32
|
||||
}
|
||||
|
||||
// NV0005_ALLOC_PARAMETERS is the alloc params type for NV01_EVENT* classes
|
||||
// from src/common/sdk/nvidia/inc/class/cl0005.h.
|
||||
//
|
||||
// +marshal
|
||||
type NV0005_ALLOC_PARAMETERS struct {
|
||||
HParentClient Handle
|
||||
HSrcResource Handle
|
||||
HClass ClassID
|
||||
NotifyIndex uint32
|
||||
Data P64 // actually FD for NV01_EVENT_OS_EVENT, see src/nvidia/src/kernel/rmapi/event.c:eventConstruct_IMPL() => src/nvidia/arch/nvalloc/unix/src/os.c:osUserHandleToKernelPtr()
|
||||
}
|
||||
|
||||
// From src/common/sdk/nvidia/inc/class/cl208f.h
|
||||
const (
|
||||
NV20_SUBDEVICE_DIAG = 0x0000208f
|
||||
)
|
||||
|
||||
// From src/common/sdk/nvidia/inc/class/cl0070.h:
|
||||
const (
|
||||
NV_MEMORY_VIRTUAL_SYSMEM_DYNAMIC_HVASPACE = 0xffffffff
|
||||
)
|
||||
|
||||
// NV_MEMORY_VIRTUAL_ALLOCATION_PARAMS is the alloc params type for
|
||||
// NV01_MEMORY_VIRTUAL, from src/common/sdk/nvidia/inc/class/cl0070.h.
|
||||
//
|
||||
// +marshal
|
||||
type NV_MEMORY_VIRTUAL_ALLOCATION_PARAMS struct {
|
||||
Offset uint64
|
||||
Limit uint64
|
||||
HVASpace Handle
|
||||
Pad0 [4]byte
|
||||
}
|
||||
|
||||
// From src/common/sdk/nvidia/inc/class/cl0073.h
|
||||
const (
|
||||
NV04_DISPLAY_COMMON = 0x00000073
|
||||
)
|
||||
|
||||
// NV0080_ALLOC_PARAMETERS is the alloc params type for NV01_DEVICE_0, from
|
||||
// src/common/sdk/nvidia/inc/class/cl0080.h.
|
||||
//
|
||||
// +marshal
|
||||
type NV0080_ALLOC_PARAMETERS struct {
|
||||
DeviceID uint32
|
||||
HClientShare Handle
|
||||
HTargetClient Handle
|
||||
HTargetDevice Handle
|
||||
Flags uint32
|
||||
Pad0 [4]byte
|
||||
VASpaceSize uint64
|
||||
VAStartInternal uint64
|
||||
VALimitInternal uint64
|
||||
VAMode uint32
|
||||
Pad1 [4]byte
|
||||
}
|
||||
|
||||
// NV_SEMAPHORE_SURFACE_ALLOC_PARAMETERS is the alloc params type for
|
||||
// NV_SEMAPHORE_SURFACE, from src/common/sdk/nvidia/inc/class/cl00da.h.
|
||||
//
|
||||
// +marshal
|
||||
type NV_SEMAPHORE_SURFACE_ALLOC_PARAMETERS struct {
|
||||
HSemaphoreMem Handle
|
||||
HMaxSubmittedMem Handle
|
||||
flags uint64
|
||||
}
|
||||
|
||||
// NV2080_ALLOC_PARAMETERS is the alloc params type for NV20_SUBDEVICE_0, from
|
||||
// src/common/sdk/nvidia/inc/class/cl2080.h.
|
||||
//
|
||||
// +marshal
|
||||
type NV2080_ALLOC_PARAMETERS struct {
|
||||
SubDeviceID uint32
|
||||
}
|
||||
|
||||
// NV_CONTEXT_DMA_ALLOCATION_PARAMS is the alloc params type for various NV01_CONTEXT_DMA
|
||||
// allocation classes, from src/common/sdk/nvidia/inc/nvos.h.
|
||||
//
|
||||
// +marshal
|
||||
type NV_CONTEXT_DMA_ALLOCATION_PARAMS struct {
|
||||
HSubDevice Handle
|
||||
Flags uint32
|
||||
HMemory Handle
|
||||
_ uint32
|
||||
Offset uint64
|
||||
Limit uint64
|
||||
}
|
||||
|
||||
// NV_MEMORY_ALLOCATION_PARAMS is the alloc params type for various NV*_MEMORY*
|
||||
// allocation classes, from src/common/sdk/nvidia/inc/nvos.h.
|
||||
//
|
||||
// +marshal
|
||||
type NV_MEMORY_ALLOCATION_PARAMS struct {
|
||||
Owner uint32
|
||||
Type uint32
|
||||
Flags uint32
|
||||
Width uint32
|
||||
Height uint32
|
||||
Pitch int32
|
||||
Attr uint32
|
||||
Attr2 uint32
|
||||
Format uint32
|
||||
ComprCovg uint32
|
||||
ZcullCovg uint32
|
||||
_ uint32
|
||||
RangeLo uint64
|
||||
RangeHi uint64
|
||||
Size uint64
|
||||
Alignment uint64
|
||||
Offset uint64
|
||||
Limit uint64
|
||||
Address P64
|
||||
CtagOffset uint32
|
||||
HVASpace Handle
|
||||
InternalFlags uint32
|
||||
Tag uint32
|
||||
}
|
||||
|
||||
// NV_MEMORY_ALLOCATION_PARAMS_V545 is the updated version of
|
||||
// NV_MEMORY_ALLOCATION_PARAMS since 545.23.06.
|
||||
//
|
||||
// +marshal
|
||||
type NV_MEMORY_ALLOCATION_PARAMS_V545 struct {
|
||||
NV_MEMORY_ALLOCATION_PARAMS
|
||||
NumaNode int32
|
||||
_ uint32
|
||||
}
|
||||
|
||||
// NV503B_BAR1_P2P_DMA_INFO from src/common/sdk/nvidia/inc/class/cl503b.h.
|
||||
//
|
||||
// +marshal
|
||||
type NV503B_BAR1_P2P_DMA_INFO struct {
|
||||
DmaAddress uint64
|
||||
DmaSize uint64
|
||||
}
|
||||
|
||||
// NV503B_ALLOC_PARAMETERS is the alloc params type for NV50_P2P, from
|
||||
// src/common/sdk/nvidia/inc/class/cl503b.h.
|
||||
//
|
||||
// +marshal
|
||||
type NV503B_ALLOC_PARAMETERS struct {
|
||||
HSubDevice Handle
|
||||
HPeerSubDevice Handle
|
||||
SubDevicePeerIDMask uint32
|
||||
PeerSubDevicePeerIDMask uint32
|
||||
MailboxBar1Addr uint64
|
||||
MailboxTotalSize uint32
|
||||
Flags uint32
|
||||
SubDeviceEgmPeerIDMask uint32
|
||||
PeerSubDeviceEgmPeerIDMask uint32
|
||||
L2pBar1P2PDmaInfo NV503B_BAR1_P2P_DMA_INFO
|
||||
P2lBar1P2PDmaInfo NV503B_BAR1_P2P_DMA_INFO
|
||||
}
|
||||
|
||||
// NV503C_ALLOC_PARAMETERS is the alloc params type for NV50_THIRD_PARTY_P2P,
|
||||
// from src/common/sdk/nvidia/inc/class/cl503c.h.
|
||||
//
|
||||
// +marshal
|
||||
type NV503C_ALLOC_PARAMETERS struct {
|
||||
Flags uint32
|
||||
}
|
||||
|
||||
// NV83DE_ALLOC_PARAMETERS is the alloc params type for GT200_DEBUGGER,
|
||||
// from src/common/sdk/nvidia/inc/class/cl83de.h.
|
||||
//
|
||||
// +marshal
|
||||
type NV83DE_ALLOC_PARAMETERS struct {
|
||||
HDebuggerClient_Obsolete Handle
|
||||
HAppClient Handle
|
||||
HClass3DObject Handle
|
||||
}
|
||||
|
||||
// NV_CTXSHARE_ALLOCATION_PARAMETERS is the alloc params type for
|
||||
// FERMI_CONTEXT_SHARE_A, from src/common/sdk/nvidia/inc/nvos.h.
|
||||
//
|
||||
// +marshal
|
||||
type NV_CTXSHARE_ALLOCATION_PARAMETERS struct {
|
||||
HVASpace Handle
|
||||
Flags uint32
|
||||
SubctxID uint32
|
||||
}
|
||||
|
||||
// NV_VASPACE_ALLOCATION_PARAMETERS is the alloc params type for
|
||||
// FERMI_VASPACE_A, from src/common/sdk/nvidia/inc/nvos.h.
|
||||
//
|
||||
// +marshal
|
||||
type NV_VASPACE_ALLOCATION_PARAMETERS struct {
|
||||
Index uint32
|
||||
Flags uint32
|
||||
VASize uint64
|
||||
VAStartInternal uint64
|
||||
VALimitInternal uint64
|
||||
BigPageSize uint32
|
||||
Pad0 [4]byte
|
||||
VABase uint64
|
||||
}
|
||||
|
||||
// NV_VASPACE_ALLOCATION_PARAMETERS_V580 is the updated version of
|
||||
// NV_VASPACE_ALLOCATION_PARAMETERS since 580.65.06.
|
||||
//
|
||||
// +marshal
|
||||
type NV_VASPACE_ALLOCATION_PARAMETERS_V580 struct {
|
||||
NV_VASPACE_ALLOCATION_PARAMETERS
|
||||
Pasid uint32
|
||||
Pad1 [4]byte
|
||||
}
|
||||
|
||||
// NV_CHANNEL_GROUP_ALLOCATION_PARAMETERS is the alloc params type for
|
||||
// KEPLER_CHANNEL_GROUP_A, from src/common/sdk/nvidia/inc/nvos.h.
|
||||
//
|
||||
// +marshal
|
||||
type NV_CHANNEL_GROUP_ALLOCATION_PARAMETERS struct {
|
||||
HObjectError Handle
|
||||
HObjectECCError Handle
|
||||
HVASpace Handle
|
||||
EngineType uint32
|
||||
BIsCallingContextVgpuPlugin uint8
|
||||
Pad0 [3]byte
|
||||
}
|
||||
|
||||
// NV_MEMORY_DESC_PARAMS is from
|
||||
// src/common/sdk/nvidia/inc/alloc/alloc_channel.h.
|
||||
//
|
||||
// +marshal
|
||||
type NV_MEMORY_DESC_PARAMS struct {
|
||||
Base uint64
|
||||
Size uint64
|
||||
AddressSpace uint32
|
||||
CacheAttrib uint32
|
||||
}
|
||||
|
||||
// NV_BSP_ALLOCATION_PARAMETERS is the alloc params type for
|
||||
// NV*VIDEO_DECODER, from src/common/sdk/nvidia/inc/nvos.h.
|
||||
//
|
||||
// +marshal
|
||||
type NV_BSP_ALLOCATION_PARAMETERS struct {
|
||||
Size uint32
|
||||
ProhibitMultipleInstances uint32
|
||||
EngineInstance uint32
|
||||
}
|
||||
|
||||
// NV_MSENC_ALLOCATION_PARAMETERS is the alloc params type for
|
||||
// NV*_VIDEO_ENCODER, from src/common/sdk/nvidia/inc/nvos.h.
|
||||
//
|
||||
// +marshal
|
||||
type NV_MSENC_ALLOCATION_PARAMETERS struct {
|
||||
Size uint32
|
||||
ProhibitMultipleInstances uint32
|
||||
EngineInstance uint32
|
||||
}
|
||||
|
||||
// NV_CHANNEL_ALLOC_PARAMS is the alloc params type for TURING_CHANNEL_GPFIFO_A
|
||||
// and AMPERE_CHANNEL_GPFIFO_A, from
|
||||
// src/common/sdk/nvidia/inc/alloc/alloc_channel.h.
|
||||
//
|
||||
// +marshal
|
||||
type NV_CHANNEL_ALLOC_PARAMS struct {
|
||||
HObjectError Handle
|
||||
HObjectBuffer Handle
|
||||
GPFIFOOffset uint64
|
||||
GPFIFOEntries uint32
|
||||
Flags uint32
|
||||
HContextShare Handle
|
||||
HVASpace Handle
|
||||
HUserdMemory [NV_MAX_SUBDEVICES]Handle
|
||||
UserdOffset [NV_MAX_SUBDEVICES]uint64
|
||||
EngineType uint32
|
||||
CID uint32
|
||||
SubDeviceID uint32
|
||||
HObjectECCError Handle
|
||||
InstanceMem NV_MEMORY_DESC_PARAMS
|
||||
UserdMem NV_MEMORY_DESC_PARAMS
|
||||
RamfcMem NV_MEMORY_DESC_PARAMS
|
||||
MthdbufMem NV_MEMORY_DESC_PARAMS
|
||||
HPhysChannelGroup Handle
|
||||
InternalFlags uint32
|
||||
ErrorNotifierMem NV_MEMORY_DESC_PARAMS
|
||||
ECCErrorNotifierMem NV_MEMORY_DESC_PARAMS
|
||||
ProcessID uint32
|
||||
SubProcessID uint32
|
||||
EncryptIv [CC_CHAN_ALLOC_IV_SIZE_DWORD]uint32
|
||||
DecryptIv [CC_CHAN_ALLOC_IV_SIZE_DWORD]uint32
|
||||
HmacNonce [CC_CHAN_ALLOC_NONCE_SIZE_DWORD]uint32
|
||||
}
|
||||
|
||||
// NV_CHANNEL_ALLOC_PARAMS_V570 is the updated version of
|
||||
// NV_CHANNEL_ALLOC_PARAMS since 570.86.15.
|
||||
//
|
||||
// +marshal
|
||||
type NV_CHANNEL_ALLOC_PARAMS_V570 struct {
|
||||
NV_CHANNEL_ALLOC_PARAMS
|
||||
TPCConfigID uint32
|
||||
_ uint32
|
||||
}
|
||||
|
||||
// NVB0B5_ALLOCATION_PARAMETERS is the alloc param type for TURING_DMA_COPY_A,
|
||||
// AMPERE_DMA_COPY_A, and AMPERE_DMA_COPY_B from
|
||||
// src/common/sdk/nvidia/inc/class/clb0b5sw.h.
|
||||
//
|
||||
// +marshal
|
||||
type NVB0B5_ALLOCATION_PARAMETERS struct {
|
||||
Version uint32
|
||||
EngineType uint32
|
||||
}
|
||||
|
||||
// NV_GR_ALLOCATION_PARAMETERS is the alloc param type for TURING_COMPUTE_A,
|
||||
// AMPERE_COMPUTE_A, and ADA_COMPUTE_A, from src/common/sdk/nvidia/inc/nvos.h.
|
||||
//
|
||||
// +marshal
|
||||
type NV_GR_ALLOCATION_PARAMETERS struct {
|
||||
Version uint32
|
||||
Flags uint32
|
||||
Size uint32
|
||||
Caps uint32
|
||||
}
|
||||
|
||||
// NV_HOPPER_USERMODE_A_PARAMS is the alloc param type for HOPPER_USERMODE_A,
|
||||
// from src/common/sdk/nvidia/inc/nvos.h.
|
||||
//
|
||||
// +marshal
|
||||
type NV_HOPPER_USERMODE_A_PARAMS struct {
|
||||
Bar1Mapping uint8
|
||||
Priv uint8
|
||||
}
|
||||
|
||||
// NV9072_ALLOCATION_PARAMETERS is the alloc param type for GF100_DISP_SW,
|
||||
// from src/common/sdk/nvidia/inc/class/cl9072.h.
|
||||
//
|
||||
// +marshal
|
||||
type NV9072_ALLOCATION_PARAMETERS struct {
|
||||
LogicalHeadID uint32
|
||||
DisplayMask uint32
|
||||
Caps uint32
|
||||
}
|
||||
|
||||
// NV00DE_ALLOC_PARAMETERS is the alloc param type for RM_USER_SHARED_DATA,
|
||||
// from src/common/sdk/nvidia/inc/class/cl00de.h.
|
||||
//
|
||||
// +marshal
|
||||
type NV00DE_ALLOC_PARAMETERS struct {
|
||||
Reserved uint32
|
||||
}
|
||||
|
||||
// NV00DE_ALLOC_PARAMETERS_V545 is the updated version of
|
||||
// NV00DE_ALLOC_PARAMETERS since 545.23.06.
|
||||
//
|
||||
// +marshal
|
||||
type NV00DE_ALLOC_PARAMETERS_V545 struct {
|
||||
PolledDataMask uint64
|
||||
}
|
||||
|
||||
// +marshal
|
||||
type nv00f8Map struct {
|
||||
offset uint64
|
||||
hVidMem Handle
|
||||
flags uint32
|
||||
}
|
||||
|
||||
// NV00F8_ALLOCATION_PARAMETERS is the alloc param type for NV_MEMORY_FABRIC,
|
||||
// from src/common/sdk/nvidia/inc/class/cl00f8.h.
|
||||
//
|
||||
// +marshal
|
||||
type NV00F8_ALLOCATION_PARAMETERS struct {
|
||||
Alignment uint64
|
||||
AllocSize uint64
|
||||
PageSize uint64
|
||||
AllocFlags uint32
|
||||
_ uint32
|
||||
Map nv00f8Map
|
||||
}
|
||||
|
||||
// From src/common/sdk/nvidia/inc/class/cl00e0.h
|
||||
const (
|
||||
NV_MEM_EXPORT_UUID_LEN = 16
|
||||
)
|
||||
|
||||
// NV_EXPORT_MEM_PACKET is from
|
||||
// src/common/sdk/nvidia/inc/class/cl00e0.h
|
||||
//
|
||||
// +marshal
|
||||
type NV_EXPORT_MEM_PACKET struct {
|
||||
UUID [NV_MEM_EXPORT_UUID_LEN]uint8
|
||||
Opaque [16]uint8
|
||||
}
|
||||
|
||||
// NV00FD_ALLOCATION_PARAMETERS is the alloc param type for NV_MEMORY_MULTICAST_FABRIC
|
||||
// from src/common/sdk/nvidia/inc/class/cl00fd.h
|
||||
//
|
||||
// +marshal
|
||||
type NV00FD_ALLOCATION_PARAMETERS struct {
|
||||
Alignment uint64
|
||||
AllocSize uint64
|
||||
PageSize uint32
|
||||
AllocFlags uint32
|
||||
NumGPUs uint32
|
||||
_ uint32
|
||||
POsEvent P64
|
||||
}
|
||||
|
||||
// NV00FD_ALLOCATION_PARAMETERS_V545 is the updated version of
|
||||
// NV00FD_ALLOCATION_PARAMETERS since 545.23.06.
|
||||
//
|
||||
// +marshal
|
||||
type NV00FD_ALLOCATION_PARAMETERS_V545 struct {
|
||||
ExpPacket NV_EXPORT_MEM_PACKET
|
||||
Index uint16
|
||||
_ [6]byte
|
||||
NV00FD_ALLOCATION_PARAMETERS
|
||||
}
|
||||
|
||||
// NV_MEMORY_MAPPER_ALLOCATION_PARAMS is the alloc param type for
|
||||
// NV_MEMORY_MAPPER, from src/common/sdk/nvidia/inc/class/cl00fe.h.
|
||||
//
|
||||
// +marshal
|
||||
type NV_MEMORY_MAPPER_ALLOCATION_PARAMS struct {
|
||||
unused uint8
|
||||
}
|
||||
|
||||
// NV_MEMORY_MAPPER_ALLOCATION_PARAMS_V550 is the updated version of
|
||||
// NV_MEMORY_MAPPER_ALLOCATION_PARAMS since 550.40.07.
|
||||
//
|
||||
// +marshal
|
||||
type NV_MEMORY_MAPPER_ALLOCATION_PARAMS_V550 struct {
|
||||
HSemaphoreSurface Handle
|
||||
MaxQueueSize uint32
|
||||
}
|
||||
|
||||
// NV_MEMORY_MAPPER_ALLOCATION_PARAMS_V555 is the updated version of
|
||||
// NV_MEMORY_MAPPER_ALLOCATION_PARAMS_V550 since 555.42.02.
|
||||
//
|
||||
// +marshal
|
||||
type NV_MEMORY_MAPPER_ALLOCATION_PARAMS_V555 struct {
|
||||
NV_MEMORY_MAPPER_ALLOCATION_PARAMS_V550
|
||||
HNotificationMemory Handle
|
||||
_ uint32
|
||||
NotificationOffset uint64
|
||||
}
|
||||
|
||||
// NV_CONFIDENTIAL_COMPUTE_ALLOC_PARAMS is the alloc param type for
|
||||
// NV_CONFIDENTIAL_COMPUTE, from src/common/sdk/nvidia/inc/class/clcb33.h.
|
||||
//
|
||||
// +marshal
|
||||
type NV_CONFIDENTIAL_COMPUTE_ALLOC_PARAMS struct {
|
||||
Handle Handle
|
||||
}
|
||||
|
||||
// NVA0BC_ALLOC_PARAMETERS is the alloc param type for
|
||||
// NVENC_SW_SESSION, from src/common/sdk/nvidia/inc/class/cla0bc.h
|
||||
//
|
||||
// +marshal
|
||||
type NVA0BC_ALLOC_PARAMETERS struct {
|
||||
CodecType uint32
|
||||
HResolution uint32
|
||||
VResolution uint32
|
||||
Version uint32
|
||||
HMem Handle
|
||||
}
|
||||
719
pkg/abi/nvgpu/ctrl.go
Normal file
719
pkg/abi/nvgpu/ctrl.go
Normal file
|
|
@ -0,0 +1,719 @@
|
|||
// Copyright 2023 The gVisor Authors.
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
package nvgpu
|
||||
|
||||
// From src/nvidia/interface/deprecated/rmapi_deprecated.h:
|
||||
const (
|
||||
RM_GSS_LEGACY_MASK = 0x00008000
|
||||
)
|
||||
|
||||
// From src/nvidia/inc/kernel/rmapi/param_copy.h:
|
||||
const (
|
||||
// RMAPI_PARAM_COPY_MAX_PARAMS_SIZE is the size limit imposed while copying
|
||||
// "embedded pointers" in rmapi parameter structs.
|
||||
// See src/nvidia/src/kernel/rmapi/param_copy.c:rmapiParamsAcquire().
|
||||
RMAPI_PARAM_COPY_MAX_PARAMS_SIZE = 1 * 1024 * 1024
|
||||
)
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrlxxxx.h:
|
||||
|
||||
// NVXXXX_CTRL_XXX_INFO is typedef-ed as the following in the driver:
|
||||
// - NV0080_CTRL_GR_INFO
|
||||
// - NV2080_CTRL_FB_INFO
|
||||
// - NV2080_CTRL_GR_INFO
|
||||
// - NV2080_CTRL_BIOS_INFO
|
||||
// - NV0041_CTRL_SURFACE_INFO
|
||||
//
|
||||
// +marshal
|
||||
type NVXXXX_CTRL_XXX_INFO struct {
|
||||
Index uint32
|
||||
Data uint32
|
||||
}
|
||||
|
||||
// CtrlXxxInfoSize is sizeof(NVXXXX_CTRL_XXX_INFO).
|
||||
var CtrlXxxInfoSize = uint32((*NVXXXX_CTRL_XXX_INFO)(nil).SizeBytes())
|
||||
|
||||
// HasCtrlInfoList is a type constraint for parameter structs containing a list
|
||||
// of NVXXXX_CTRL_XXX_INFO and are simple otherwise.
|
||||
type HasCtrlInfoList interface {
|
||||
ListSize() uint32
|
||||
SetCtrlInfoList(ptr P64)
|
||||
CtrlInfoList() P64
|
||||
}
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrl0000/ctrl0000client.h:
|
||||
const (
|
||||
NV0000_CTRL_CMD_CLIENT_GET_ADDR_SPACE_TYPE = 0xd01
|
||||
NV0000_CTRL_CMD_CLIENT_SET_INHERITED_SHARE_POLICY = 0xd04
|
||||
)
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrl0000/ctrl0000gpu.h:
|
||||
const (
|
||||
NV0000_CTRL_CMD_GPU_GET_ATTACHED_IDS = 0x201
|
||||
NV0000_CTRL_CMD_GPU_GET_ID_INFO = 0x202
|
||||
NV0000_CTRL_CMD_GPU_GET_DEVICE_IDS = 0x204
|
||||
NV0000_CTRL_CMD_GPU_GET_ID_INFO_V2 = 0x205
|
||||
NV0000_CTRL_CMD_GPU_GET_PROBED_IDS = 0x214
|
||||
NV0000_CTRL_CMD_GPU_ATTACH_IDS = 0x215
|
||||
NV0000_CTRL_CMD_GPU_DETACH_IDS = 0x216
|
||||
NV0000_CTRL_CMD_GPU_GET_PCI_INFO = 0x21b
|
||||
NV0000_CTRL_CMD_GPU_GET_UUID_FROM_GPU_ID = 0x275
|
||||
NV0000_CTRL_CMD_GPU_QUERY_DRAIN_STATE = 0x279
|
||||
NV0000_CTRL_CMD_GPU_GET_MEMOP_ENABLE = 0x27b
|
||||
NV0000_CTRL_CMD_GPU_GET_ACTIVE_DEVICE_IDS = 0x288
|
||||
NV0000_CTRL_CMD_GPU_ASYNC_ATTACH_ID = 0x289
|
||||
NV0000_CTRL_CMD_GPU_WAIT_ATTACH_ID = 0x290
|
||||
)
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrl0000/ctrl0000gsync.h:
|
||||
const (
|
||||
NV0000_CTRL_CMD_GSYNC_GET_ATTACHED_IDS = 0x301
|
||||
)
|
||||
|
||||
// NV0000_CTRL_GPU_GET_ID_INFO_PARAMS is the param type for NV0000_CTRL_CMD_GPU_GET_ID_INFO,
|
||||
// from src/common/sdk/nvidia/inc/ctrl/ctrl0000/ctrl0000gpu.h.
|
||||
//
|
||||
// +marshal
|
||||
type NV0000_CTRL_GPU_GET_ID_INFO_PARAMS struct {
|
||||
GpuID uint32
|
||||
GpuFlags uint32
|
||||
DeviceInstance uint32
|
||||
SubDeviceInstance uint32
|
||||
SzName P64
|
||||
SliStatus uint32
|
||||
BoardID uint32
|
||||
GpuInstance uint32
|
||||
NumaID int32
|
||||
}
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrl0000/ctrl0000syncgpuboost.h:
|
||||
const (
|
||||
NV0000_CTRL_CMD_SYNC_GPU_BOOST_GROUP_INFO = 0xa04
|
||||
)
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrl0000/ctrl0000system.h:
|
||||
const (
|
||||
NV0000_CTRL_CMD_SYSTEM_GET_BUILD_VERSION = 0x101
|
||||
NV0000_CTRL_CMD_SYSTEM_GET_CPU_INFO = 0x102
|
||||
NV0000_CTRL_CMD_SYSTEM_GET_P2P_CAPS = 0x127
|
||||
NV0000_CTRL_CMD_SYSTEM_GET_P2P_CAPS_V2 = 0x12b
|
||||
NV0000_CTRL_CMD_SYSTEM_GET_FABRIC_STATUS = 0x136
|
||||
NV0000_CTRL_CMD_SYSTEM_GET_P2P_CAPS_MATRIX = 0x13a
|
||||
NV0000_CTRL_CMD_SYSTEM_GET_FEATURES = 0x1f0
|
||||
NV0000_CTRL_SYSTEM_MAX_ATTACHED_GPUS = 32
|
||||
NV0000_CTRL_P2P_CAPS_INDEX_TABLE_SIZE = 9
|
||||
)
|
||||
|
||||
// NV0000_CTRL_SYSTEM_GET_P2P_CAPS_PARAMS is the param type for NV0000_CTRL_CMD_SYSTEM_GET_P2P_CAPS,
|
||||
// from src/common/sdk/nvidia/inc/ctrl/ctrl0000/ctrl0000system.h.
|
||||
//
|
||||
// +marshal
|
||||
type NV0000_CTRL_SYSTEM_GET_P2P_CAPS_PARAMS struct {
|
||||
GpuIDs [NV0000_CTRL_SYSTEM_MAX_ATTACHED_GPUS]uint32
|
||||
GpuCount uint32
|
||||
P2PCaps uint32
|
||||
P2POptimalReadCEs uint32
|
||||
P2POptimalWriteCEs uint32
|
||||
P2PCapsStatus [NV0000_CTRL_P2P_CAPS_INDEX_TABLE_SIZE]uint8
|
||||
_ [7]byte
|
||||
BusPeerIDs P64
|
||||
}
|
||||
|
||||
// NV0000_CTRL_SYSTEM_GET_P2P_CAPS_PARAMS_V550 is the updated version of
|
||||
// NV0000_CTRL_SYSTEM_GET_P2P_CAPS_PARAMS since 550.40.07.
|
||||
//
|
||||
// +marshal
|
||||
type NV0000_CTRL_SYSTEM_GET_P2P_CAPS_PARAMS_V550 struct {
|
||||
NV0000_CTRL_SYSTEM_GET_P2P_CAPS_PARAMS
|
||||
BusEgmPeerIDs P64
|
||||
}
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrl0000/ctrl0000unix.h:
|
||||
const (
|
||||
NV0000_CTRL_CMD_OS_UNIX_EXPORT_OBJECT_TO_FD = 0x3d05
|
||||
NV0000_CTRL_CMD_OS_UNIX_IMPORT_OBJECT_FROM_FD = 0x3d06
|
||||
NV0000_CTRL_CMD_OS_UNIX_GET_EXPORT_OBJECT_INFO = 0x3d08
|
||||
NV0000_CTRL_CMD_OS_UNIX_EXPORT_OBJECTS_TO_FD = 0x3d0b
|
||||
NV0000_CTRL_CMD_OS_UNIX_IMPORT_OBJECTS_FROM_FD = 0x3d0c
|
||||
NV0000_OS_UNIX_EXPORT_OBJECT_FD_BUFFER_SIZE = 64
|
||||
NV0000_CTRL_OS_UNIX_EXPORT_OBJECTS_TO_FD_MAX_OBJECTS = 512
|
||||
NV0000_CTRL_OS_UNIX_IMPORT_OBJECTS_TO_FD_MAX_OBJECTS = 128
|
||||
)
|
||||
|
||||
// +marshal
|
||||
type NV0000_CTRL_OS_UNIX_GET_EXPORT_OBJECT_INFO_PARAMS struct {
|
||||
FD int32
|
||||
DeviceInstance uint32
|
||||
MaxObjects uint16
|
||||
Metadata [NV0000_OS_UNIX_EXPORT_OBJECT_FD_BUFFER_SIZE]uint8
|
||||
Pad [2]byte
|
||||
}
|
||||
|
||||
// GetFrontendFD implements HasFrontendFD.GetFrontendFD.
|
||||
func (p *NV0000_CTRL_OS_UNIX_GET_EXPORT_OBJECT_INFO_PARAMS) GetFrontendFD() int32 {
|
||||
return p.FD
|
||||
}
|
||||
|
||||
// SetFrontendFD implements HasFrontendFD.SetFrontendFD.
|
||||
func (p *NV0000_CTRL_OS_UNIX_GET_EXPORT_OBJECT_INFO_PARAMS) SetFrontendFD(fd int32) {
|
||||
p.FD = fd
|
||||
}
|
||||
|
||||
// +marshal
|
||||
type NV0000_CTRL_OS_UNIX_GET_EXPORT_OBJECT_INFO_PARAMS_V545 struct {
|
||||
FD int32
|
||||
DeviceInstance uint32
|
||||
GpuInstanceID uint32
|
||||
MaxObjects uint16
|
||||
Metadata [NV0000_OS_UNIX_EXPORT_OBJECT_FD_BUFFER_SIZE]uint8
|
||||
Pad [2]byte
|
||||
}
|
||||
|
||||
// GetFrontendFD implements HasFrontendFD.GetFrontendFD.
|
||||
func (p *NV0000_CTRL_OS_UNIX_GET_EXPORT_OBJECT_INFO_PARAMS_V545) GetFrontendFD() int32 {
|
||||
return p.FD
|
||||
}
|
||||
|
||||
// SetFrontendFD implements HasFrontendFD.SetFrontendFD.
|
||||
func (p *NV0000_CTRL_OS_UNIX_GET_EXPORT_OBJECT_INFO_PARAMS_V545) SetFrontendFD(fd int32) {
|
||||
p.FD = fd
|
||||
}
|
||||
|
||||
// +marshal
|
||||
type NV0000_CTRL_OS_UNIX_EXPORT_OBJECT struct {
|
||||
Type uint32 // enum NV0000_CTRL_OS_UNIX_EXPORT_OBJECT_TYPE
|
||||
Data [12]byte // union
|
||||
}
|
||||
|
||||
// +marshal
|
||||
type NV0000_CTRL_OS_UNIX_EXPORT_OBJECT_TO_FD_PARAMS struct {
|
||||
Object NV0000_CTRL_OS_UNIX_EXPORT_OBJECT
|
||||
FD int32
|
||||
Flags uint32
|
||||
}
|
||||
|
||||
// GetFrontendFD implements HasFrontendFD.GetFrontendFD.
|
||||
func (p *NV0000_CTRL_OS_UNIX_EXPORT_OBJECT_TO_FD_PARAMS) GetFrontendFD() int32 {
|
||||
return p.FD
|
||||
}
|
||||
|
||||
// SetFrontendFD implements HasFrontendFD.SetFrontendFD.
|
||||
func (p *NV0000_CTRL_OS_UNIX_EXPORT_OBJECT_TO_FD_PARAMS) SetFrontendFD(fd int32) {
|
||||
p.FD = fd
|
||||
}
|
||||
|
||||
// +marshal
|
||||
type NV0000_CTRL_OS_UNIX_IMPORT_OBJECT_FROM_FD_PARAMS struct {
|
||||
FD int32
|
||||
Object NV0000_CTRL_OS_UNIX_EXPORT_OBJECT
|
||||
}
|
||||
|
||||
// GetFrontendFD implements HasFrontendFD.GetFrontendFD.
|
||||
func (p *NV0000_CTRL_OS_UNIX_IMPORT_OBJECT_FROM_FD_PARAMS) GetFrontendFD() int32 {
|
||||
return p.FD
|
||||
}
|
||||
|
||||
// SetFrontendFD implements HasFrontendFD.SetFrontendFD.
|
||||
func (p *NV0000_CTRL_OS_UNIX_IMPORT_OBJECT_FROM_FD_PARAMS) SetFrontendFD(fd int32) {
|
||||
p.FD = fd
|
||||
}
|
||||
|
||||
// +marshal
|
||||
type NV0000_CTRL_OS_UNIX_EXPORT_OBJECTS_TO_FD_PARAMS struct {
|
||||
FD int32
|
||||
HDevice Handle
|
||||
MaxObjects uint16
|
||||
Metadata [NV0000_OS_UNIX_EXPORT_OBJECT_FD_BUFFER_SIZE]uint8
|
||||
Pad [2]byte
|
||||
Objects [NV0000_CTRL_OS_UNIX_EXPORT_OBJECTS_TO_FD_MAX_OBJECTS]Handle
|
||||
NumObjects uint16
|
||||
Index uint16
|
||||
}
|
||||
|
||||
// GetFrontendFD implements HasFrontendFD.GetFrontendFD.
|
||||
func (p *NV0000_CTRL_OS_UNIX_EXPORT_OBJECTS_TO_FD_PARAMS) GetFrontendFD() int32 {
|
||||
return p.FD
|
||||
}
|
||||
|
||||
// SetFrontendFD implements HasFrontendFD.SetFrontendFD.
|
||||
func (p *NV0000_CTRL_OS_UNIX_EXPORT_OBJECTS_TO_FD_PARAMS) SetFrontendFD(fd int32) {
|
||||
p.FD = fd
|
||||
}
|
||||
|
||||
// +marshal
|
||||
type NV0000_CTRL_OS_UNIX_IMPORT_OBJECTS_FROM_FD_PARAMS struct {
|
||||
FD int32
|
||||
HParent Handle
|
||||
Objects [NV0000_CTRL_OS_UNIX_IMPORT_OBJECTS_TO_FD_MAX_OBJECTS]Handle
|
||||
ObjectTypes [NV0000_CTRL_OS_UNIX_IMPORT_OBJECTS_TO_FD_MAX_OBJECTS]uint8
|
||||
NumObjects uint16
|
||||
Index uint16
|
||||
}
|
||||
|
||||
// GetFrontendFD implements HasFrontendFD.GetFrontendFD.
|
||||
func (p *NV0000_CTRL_OS_UNIX_IMPORT_OBJECTS_FROM_FD_PARAMS) GetFrontendFD() int32 {
|
||||
return p.FD
|
||||
}
|
||||
|
||||
// SetFrontendFD implements HasFrontendFD.SetFrontendFD.
|
||||
func (p *NV0000_CTRL_OS_UNIX_IMPORT_OBJECTS_FROM_FD_PARAMS) SetFrontendFD(fd int32) {
|
||||
p.FD = fd
|
||||
}
|
||||
|
||||
// +marshal
|
||||
type NV0000_CTRL_SYSTEM_GET_BUILD_VERSION_PARAMS struct {
|
||||
SizeOfStrings uint32
|
||||
Pad [4]byte
|
||||
PDriverVersionBuffer P64
|
||||
PVersionBuffer P64
|
||||
PTitleBuffer P64
|
||||
ChangelistNumber uint32
|
||||
OfficialChangelistNumber uint32
|
||||
}
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrl0080/ctrl0080dma.h.
|
||||
const (
|
||||
NV0080_CTRL_CMD_DMA_ADV_SCHED_GET_VA_CAPS = 0x801806
|
||||
NV0080_CTRL_CMD_DMA_GET_CAPS = 0x80180d
|
||||
)
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrl0041.h
|
||||
const (
|
||||
NV0041_CTRL_CMD_GET_SURFACE_INFO = 0x410110
|
||||
)
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrl0080/ctrl0080fb.h:
|
||||
const (
|
||||
NV0080_CTRL_CMD_FB_GET_CAPS = 0x801301
|
||||
NV0080_CTRL_CMD_FB_GET_CAPS_V2 = 0x801307
|
||||
)
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrl0080/ctrl0080fifo.h:
|
||||
const (
|
||||
NV0080_CTRL_CMD_FIFO_GET_CAPS = 0x801701
|
||||
NV0080_CTRL_CMD_FIFO_GET_ENGINE_CONTEXT_PROPERTIES = 0x801707
|
||||
NV0080_CTRL_CMD_FIFO_GET_CHANNELLIST = 0x80170d
|
||||
NV0080_CTRL_CMD_FIFO_GET_CAPS_V2 = 0x801713
|
||||
)
|
||||
|
||||
// +marshal
|
||||
type NV0080_CTRL_FIFO_GET_CHANNELLIST_PARAMS struct {
|
||||
NumChannels uint32
|
||||
Pad [4]byte
|
||||
PChannelHandleList P64
|
||||
PChannelList P64
|
||||
}
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrl0080/ctrl0080gpu.h:
|
||||
const (
|
||||
NV0080_CTRL_CMD_GPU_GET_CLASSLIST = 0x800201
|
||||
NV0080_CTRL_CMD_GPU_GET_NUM_SUBDEVICES = 0x800280
|
||||
NV0080_CTRL_CMD_GPU_QUERY_SW_STATE_PERSISTENCE = 0x800288
|
||||
NV0080_CTRL_CMD_GPU_GET_VIRTUALIZATION_MODE = 0x800289
|
||||
NV0080_CTRL_CMD_GPU_GET_CLASSLIST_V2 = 0x800292
|
||||
)
|
||||
|
||||
// RmapiParamNvU32List is used to represent the following types:
|
||||
// - NV0080_CTRL_GPU_GET_CLASSLIST_PARAMS
|
||||
// - NV2080_CTRL_GPU_GET_ENGINES_PARAMS
|
||||
//
|
||||
// +marshal
|
||||
type RmapiParamNvU32List struct {
|
||||
NumElems uint32
|
||||
Pad [4]byte
|
||||
List P64
|
||||
}
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrl0080/ctrl0080gr.h:
|
||||
const (
|
||||
NV0080_CTRL_CMD_GR_GET_CAPS = 0x801102
|
||||
NV0080_CTRL_CMD_GR_GET_INFO = 0x801104
|
||||
NV0080_CTRL_CMD_GR_GET_CAPS_V2 = 0x801109
|
||||
)
|
||||
|
||||
// NV0080_CTRL_GET_CAPS_PARAMS is used to represent the following:
|
||||
// - NV0080_CTRL_FB_GET_CAPS_PARAMS
|
||||
// - NV0080_CTRL_GR_GET_CAPS_PARAMS
|
||||
// - NV0080_CTRL_FIFO_GET_CAPS_PARAMS
|
||||
// - NV0080_CTRL_MSENC_GET_CAPS_PARAMS
|
||||
//
|
||||
// +marshal
|
||||
type NV0080_CTRL_GET_CAPS_PARAMS struct {
|
||||
CapsTblSize uint32
|
||||
Pad [4]byte
|
||||
CapsTbl P64
|
||||
}
|
||||
|
||||
// +marshal
|
||||
type NV0080_CTRL_GR_ROUTE_INFO struct {
|
||||
Flags uint32
|
||||
Pad [4]byte
|
||||
Route uint64
|
||||
}
|
||||
|
||||
const (
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrl208f/ctrl208fgpu.h
|
||||
NV208F_CTRL_CMD_GPU_VERIFY_INFOROM = 0x208f1105
|
||||
)
|
||||
|
||||
// NV208F_CTRL_GPU_VERIFY_INFOROM_PARAMS is used to represent to determine if an InfoROM with a
|
||||
// valid image is present.
|
||||
//
|
||||
// +marshal
|
||||
type NV208F_CTRL_GPU_VERIFY_INFOROM_PARAMS struct {
|
||||
Result uint32
|
||||
Checksum uint32
|
||||
}
|
||||
|
||||
// NvxxxCtrlXxxGetInfoParams is used to represent the following:
|
||||
// - NV0080_CTRL_GR_GET_INFO_PARAMS
|
||||
// - NV2080_CTRL_FB_GET_INFO_PARAMS
|
||||
// - NV0041_CTRL_GET_SURFACE_INFO_PARAMS
|
||||
// - NV2080_CTRL_BIOS_GET_INFO_PARAMS
|
||||
// - NV2080_CTRL_BUS_GET_INFO_PARAMS
|
||||
//
|
||||
// +marshal
|
||||
type NvxxxCtrlXxxGetInfoParams struct {
|
||||
InfoListSize uint32
|
||||
Pad [4]byte
|
||||
InfoList P64
|
||||
}
|
||||
|
||||
// ListSize implements HasCtrlInfoList.ListSize.
|
||||
func (p *NvxxxCtrlXxxGetInfoParams) ListSize() uint32 {
|
||||
return p.InfoListSize
|
||||
}
|
||||
|
||||
// SetCtrlInfoList implements HasCtrlInfoList.SetCtrlInfoList.
|
||||
func (p *NvxxxCtrlXxxGetInfoParams) SetCtrlInfoList(ptr P64) {
|
||||
p.InfoList = ptr
|
||||
}
|
||||
|
||||
// CtrlInfoList implements HasCtrlInfoList.CtrlInfoList.
|
||||
func (p *NvxxxCtrlXxxGetInfoParams) CtrlInfoList() P64 {
|
||||
return p.InfoList
|
||||
}
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrl0080/ctrl0080host.h:
|
||||
const (
|
||||
NV0080_CTRL_CMD_HOST_GET_CAPS_V2 = 0x801402
|
||||
)
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrl0080/ctrl0080perf.h:
|
||||
const (
|
||||
NV0080_CTRL_CMD_PERF_CUDA_LIMIT_SET_CONTROL = 0x801909
|
||||
)
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrl0080/ctrl0080msenc.h:
|
||||
const (
|
||||
NV0080_CTRL_CMD_MSENC_GET_CAPS = 0x801b01
|
||||
)
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrl0080/ctrl0080bsp.h
|
||||
const (
|
||||
NV0080_CTRL_CMD_BSP_GET_CAPS_V2 = 0x801c02
|
||||
)
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrl0080/ctrl0080nvjpg.h
|
||||
const (
|
||||
NV0080_CTRL_CMD_NVJPG_GET_CAPS_V2 = 0x801f02
|
||||
)
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrl00da.h:
|
||||
const (
|
||||
NV_SEMAPHORE_SURFACE_CTRL_CMD_BIND_CHANNEL = 0xda0002
|
||||
NV_SEMAPHORE_SURFACE_CTRL_CMD_UNBIND_CHANNEL = 0xda0006
|
||||
)
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrl00de.h
|
||||
const (
|
||||
NV00DE_CTRL_CMD_REQUEST_DATA_POLL = 0xde0001
|
||||
)
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrl00f8.h:
|
||||
const (
|
||||
NV00F8_CTRL_CMD_ATTACH_MEM = 0xf80103
|
||||
)
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrl00fd.h:
|
||||
const (
|
||||
NV00FD_CTRL_CMD_GET_INFO = 0xfd0101
|
||||
NV00FD_CTRL_CMD_ATTACH_MEM = 0xfd0102
|
||||
NV00FD_CTRL_CMD_ATTACH_GPU = 0xfd0104
|
||||
NV00FD_CTRL_CMD_DETACH_MEM = 0xfd0105
|
||||
)
|
||||
|
||||
// +marshal
|
||||
type NV00FD_CTRL_ATTACH_GPU_PARAMS struct {
|
||||
HSubDevice Handle
|
||||
Flags uint32
|
||||
DevDescriptor uint64
|
||||
}
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080bios.h:
|
||||
const (
|
||||
NV2080_CTRL_CMD_BIOS_GET_INFO = 0x20800802
|
||||
)
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080bus.h:
|
||||
const (
|
||||
NV2080_CTRL_CMD_BUS_GET_PCI_INFO = 0x20801801
|
||||
NV2080_CTRL_CMD_BUS_GET_PCI_BAR_INFO = 0x20801803
|
||||
NV2080_CTRL_CMD_BUS_GET_INFO = 0x20801802
|
||||
NV2080_CTRL_CMD_BUS_GET_INFO_V2 = 0x20801823
|
||||
NV2080_CTRL_CMD_BUS_GET_PCIE_SUPPORTED_GPU_ATOMICS = 0x2080182a
|
||||
NV2080_CTRL_CMD_BUS_GET_C2C_INFO = 0x2080182b
|
||||
)
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080ce.h:
|
||||
const (
|
||||
NV2080_CTRL_CMD_CE_GET_CE_PCE_MASK = 0x20802a02
|
||||
NV2080_CTRL_CMD_CE_GET_CAPS_V2 = 0x20802a03
|
||||
NV2080_CTRL_CMD_CE_GET_ALL_CAPS = 0x20802a0a
|
||||
)
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080event.h:
|
||||
const (
|
||||
NV2080_CTRL_CMD_EVENT_SET_NOTIFICATION = 0x20800301
|
||||
)
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080fb.h:
|
||||
const (
|
||||
NV2080_CTRL_CMD_FB_GET_INFO = 0x20801301
|
||||
NV2080_CTRL_CMD_FB_GET_INFO_V2 = 0x20801303
|
||||
NV2080_CTRL_CMD_FB_GET_GPU_CACHE_INFO = 0x20801315
|
||||
NV2080_CTRL_CMD_FB_GET_FB_REGION_INFO = 0x20801320
|
||||
NV2080_CTRL_CMD_FB_GET_SEMAPHORE_SURFACE_LAYOUT = 0x20801352
|
||||
NV2080_CTRL_CMD_FB_QUERY_DRAM_ENCRYPTION_INFOROM_SUPPORT = 0x20801358
|
||||
NV2080_CTRL_CMD_FB_QUERY_DRAM_ENCRYPTION_STATUS = 0x20801359
|
||||
NV2080_CTRL_CMD_FB_QUERY_DRAM_ENCRYPTION_INFOROM_SUPPORT_V575 = NV2080_CTRL_CMD_FB_QUERY_DRAM_ENCRYPTION_INFOROM_SUPPORT - 1
|
||||
NV2080_CTRL_CMD_FB_QUERY_DRAM_ENCRYPTION_STATUS_V575 = NV2080_CTRL_CMD_FB_QUERY_DRAM_ENCRYPTION_STATUS - 1
|
||||
)
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080fifo.h:
|
||||
const (
|
||||
NV2080_CTRL_CMD_FIFO_DISABLE_CHANNELS = 0x2080110b
|
||||
|
||||
NV2080_CTRL_FIFO_DISABLE_CHANNELS_MAX_ENTRIES = 64
|
||||
)
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080flcn.h:
|
||||
const (
|
||||
NV2080_CTRL_CMD_FLCN_GET_CTX_BUFFER_SIZE = 0x20803125
|
||||
)
|
||||
|
||||
// +marshal
|
||||
type NV2080_CTRL_FIFO_DISABLE_CHANNELS_PARAMS struct {
|
||||
BDisable uint8
|
||||
Pad1 [3]byte
|
||||
NumChannels uint32
|
||||
BOnlyDisableScheduling uint8
|
||||
BRewindGpPut uint8
|
||||
Pad2 [6]byte
|
||||
PRunlistPreemptEvent P64
|
||||
HClientList [NV2080_CTRL_FIFO_DISABLE_CHANNELS_MAX_ENTRIES]Handle
|
||||
HChannelList [NV2080_CTRL_FIFO_DISABLE_CHANNELS_MAX_ENTRIES]Handle
|
||||
}
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080gpu.h:
|
||||
const (
|
||||
NV2080_CTRL_CMD_GPU_GET_INFO_V2 = 0x20800102
|
||||
NV2080_CTRL_CMD_GPU_GET_NAME_STRING = 0x20800110
|
||||
NV2080_CTRL_CMD_GPU_GET_SHORT_NAME_STRING = 0x20800111
|
||||
NV2080_CTRL_CMD_GPU_GET_SIMULATION_INFO = 0x20800119
|
||||
NV2080_CTRL_CMD_GPU_GET_ENGINES = 0x20800123
|
||||
NV2080_CTRL_CMD_GPU_QUERY_ECC_STATUS = 0x2080012f
|
||||
NV2080_CTRL_CMD_GPU_QUERY_COMPUTE_MODE_RULES = 0x20800131
|
||||
NV2080_CTRL_CMD_GPU_QUERY_ECC_CONFIGURATION = 0x20800133
|
||||
NV2080_CTRL_CMD_GPU_GET_OEM_BOARD_INFO = 0x2080013f
|
||||
NV2080_CTRL_CMD_GPU_GET_ID = 0x20800142
|
||||
NV2080_CTRL_CMD_GPU_ACQUIRE_COMPUTE_MODE_RESERVATION = 0x20800145 // undocumented; paramSize == 0
|
||||
NV2080_CTRL_CMD_GPU_RELEASE_COMPUTE_MODE_RESERVATION = 0x20800146 // undocumented; paramSize == 0
|
||||
NV2080_CTRL_CMD_GPU_GET_ENGINE_PARTNERLIST = 0x20800147
|
||||
NV2080_CTRL_CMD_GPU_GET_GID_INFO = 0x2080014a
|
||||
NV2080_CTRL_CMD_GPU_GET_INFOROM_OBJECT_VERSION = 0x2080014b
|
||||
NV2080_CTRL_CMD_GPU_GET_INFOROM_IMAGE_VERSION = 0x20800156
|
||||
NV2080_CTRL_CMD_GPU_QUERY_INFOROM_ECC_SUPPORT = 0x20800157
|
||||
NV2080_CTRL_CMD_GPU_GET_ENCODER_CAPACITY = 0x2080016c
|
||||
NV2080_CTRL_CMD_GPU_GET_ENGINES_V2 = 0x20800170
|
||||
NV2080_CTRL_CMD_GPU_GET_ACTIVE_PARTITION_IDS = 0x2080018b
|
||||
NV2080_CTRL_CMD_GPU_GET_PIDS = 0x2080018d
|
||||
NV2080_CTRL_CMD_GPU_GET_PID_INFO = 0x2080018e
|
||||
NV2080_CTRL_CMD_GPU_GET_COMPUTE_POLICY_CONFIG = 0x20800195
|
||||
NV2080_CTRL_CMD_GET_GPU_FABRIC_PROBE_INFO = 0x208001a3
|
||||
)
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080gr.h:
|
||||
const (
|
||||
NV2080_CTRL_CMD_GR_GET_INFO = 0x20801201
|
||||
NV2080_CTRL_CMD_GR_GET_ZCULL_INFO = 0x20801206
|
||||
NV2080_CTRL_CMD_GR_CTXSW_ZCULL_BIND = 0x20801208
|
||||
NV2080_CTRL_CMD_GR_SET_CTXSW_PREEMPTION_MODE = 0x20801210
|
||||
NV2080_CTRL_CMD_GR_GET_CTX_BUFFER_SIZE = 0x20801218
|
||||
NV2080_CTRL_CMD_GR_GET_GLOBAL_SM_ORDER = 0x2080121b
|
||||
NV2080_CTRL_CMD_GR_GET_CAPS_V2 = 0x20801227
|
||||
NV2080_CTRL_CMD_GR_GET_GPC_MASK = 0x2080122a
|
||||
NV2080_CTRL_CMD_GR_GET_TPC_MASK = 0x2080122b
|
||||
NV2080_CTRL_CMD_GR_GET_SM_ISSUE_RATE_MODIFIER = 0x20801230
|
||||
)
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080grmgr.h:
|
||||
const (
|
||||
NV2080_CTRL_CMD_GRMGR_GET_GR_FS_INFO = 0x20803801
|
||||
)
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080gsp.h:
|
||||
const (
|
||||
NV2080_CTRL_CMD_GSP_GET_FEATURES = 0x20803601
|
||||
)
|
||||
|
||||
// +marshal
|
||||
type NV2080_CTRL_GR_GET_INFO_PARAMS struct {
|
||||
NvxxxCtrlXxxGetInfoParams
|
||||
GRRouteInfo NV0080_CTRL_GR_ROUTE_INFO
|
||||
}
|
||||
|
||||
// ListSize implements HasCtrlInfoList.ListSize.
|
||||
func (p *NV2080_CTRL_GR_GET_INFO_PARAMS) ListSize() uint32 {
|
||||
return p.InfoListSize
|
||||
}
|
||||
|
||||
// SetCtrlInfoList implements HasCtrlInfoList.SetCtrlInfoList.
|
||||
func (p *NV2080_CTRL_GR_GET_INFO_PARAMS) SetCtrlInfoList(ptr P64) {
|
||||
p.InfoList = ptr
|
||||
}
|
||||
|
||||
// CtrlInfoList implements HasCtrlInfoList.CtrlInfoList.
|
||||
func (p *NV2080_CTRL_GR_GET_INFO_PARAMS) CtrlInfoList() P64 {
|
||||
return p.InfoList
|
||||
}
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080mc.h:
|
||||
const (
|
||||
NV2080_CTRL_CMD_MC_GET_ARCH_INFO = 0x20801701
|
||||
NV2080_CTRL_CMD_MC_SERVICE_INTERRUPTS = 0x20801702
|
||||
)
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080nvlink.h:
|
||||
const (
|
||||
NV2080_CTRL_CMD_NVLINK_GET_NVLINK_CAPS = 0x20803001
|
||||
NV2080_CTRL_CMD_NVLINK_GET_NVLINK_STATUS = 0x20803002
|
||||
)
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080perf.h:
|
||||
const (
|
||||
NV2080_CTRL_CMD_PERF_BOOST = 0x2080200a
|
||||
NV2080_CTRL_CMD_PERF_GET_CURRENT_PSTATE = 0x20802068
|
||||
)
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080rc.h:
|
||||
const (
|
||||
NV2080_CTRL_CMD_RC_GET_WATCHDOG_INFO = 0x20802209
|
||||
NV2080_CTRL_CMD_RC_RELEASE_WATCHDOG_REQUESTS = 0x2080220c
|
||||
NV2080_CTRL_CMD_RC_SOFT_DISABLE_WATCHDOG = 0x20802210
|
||||
)
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080tmr.h:
|
||||
const (
|
||||
NV2080_CTRL_CMD_TIMER_GET_TIME = 0x20800403
|
||||
NV2080_CTRL_CMD_TIMER_GET_GPU_CPU_TIME_CORRELATION_INFO = 0x20800406
|
||||
NV2080_CTRL_CMD_TIMER_SET_GR_TICK_FREQ = 0x20800407
|
||||
)
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080thermal.h:
|
||||
const (
|
||||
NV2080_CTRL_CMD_THERMAL_SYSTEM_EXECUTE_V2 = 0x20800513
|
||||
)
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080unix.h:
|
||||
const (
|
||||
NV2080_CTRL_CMD_OS_UNIX_VIDMEM_PERSISTENCE_STATUS = 0x20803d07
|
||||
)
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrl503c.h:
|
||||
const (
|
||||
NV503C_CTRL_CMD_REGISTER_VA_SPACE = 0x503c0102
|
||||
NV503C_CTRL_CMD_REGISTER_VIDMEM = 0x503c0104
|
||||
NV503C_CTRL_CMD_UNREGISTER_VIDMEM = 0x503c0105
|
||||
)
|
||||
|
||||
// +marshal
|
||||
type NV503C_CTRL_REGISTER_VA_SPACE_PARAMS struct {
|
||||
HVASpace Handle
|
||||
Pad [4]byte
|
||||
VASpaceToken uint64
|
||||
}
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrl83de/ctrl83dedebug.h:
|
||||
const (
|
||||
NV83DE_CTRL_CMD_DEBUG_SET_EXCEPTION_MASK = 0x83de0309
|
||||
NV83DE_CTRL_CMD_DEBUG_READ_ALL_SM_ERROR_STATES = 0x83de030c
|
||||
NV83DE_CTRL_CMD_DEBUG_CLEAR_ALL_SM_ERROR_STATES = 0x83de0310
|
||||
)
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrlc36f.h:
|
||||
const (
|
||||
NVC36F_CTRL_GET_CLASS_ENGINEID = 0xc36f0101
|
||||
NVC36F_CTRL_CMD_GPFIFO_GET_WORK_SUBMIT_TOKEN = 0xc36f0108
|
||||
NVC36F_CTRL_CMD_GPFIFO_SET_WORK_SUBMIT_TOKEN_NOTIF_INDEX = 0xc36f010a
|
||||
)
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrlc56f.h:
|
||||
const (
|
||||
NVC56F_CTRL_CMD_GET_KMB = 0xc56f010b
|
||||
)
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrl906f.h:
|
||||
const (
|
||||
NV906F_CTRL_GET_CLASS_ENGINEID = 0x906f0101
|
||||
NV906F_CTRL_CMD_RESET_CHANNEL = 0x906f0102
|
||||
)
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrl9096.h:
|
||||
const (
|
||||
NV9096_CTRL_CMD_GET_ZBC_CLEAR_TABLE_SIZE = 0x90960106
|
||||
NV9096_CTRL_CMD_GET_ZBC_CLEAR_TABLE_ENTRY = 0x90960107
|
||||
)
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrl90e6.h:
|
||||
const (
|
||||
NV90E6_CTRL_CMD_MASTER_GET_VIRTUAL_FUNCTION_ERROR_CONT_INTR_MASK = 0x90e60102
|
||||
)
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrla06c.h:
|
||||
const (
|
||||
NVA06C_CTRL_CMD_GPFIFO_SCHEDULE = 0xa06c0101
|
||||
NVA06C_CTRL_CMD_SET_TIMESLICE = 0xa06c0103
|
||||
NVA06C_CTRL_CMD_PREEMPT = 0xa06c0105
|
||||
)
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrla06f/ctrla06fgpfifo.h:
|
||||
const (
|
||||
NVA06F_CTRL_CMD_GPFIFO_SCHEDULE = 0xa06f0103
|
||||
NVA06F_CTRL_CMD_BIND = 0xa06f0104
|
||||
)
|
||||
|
||||
// From src/common/sdk/nvidia/inc/ctrl/ctrlcb33.h:
|
||||
const (
|
||||
NV_CONF_COMPUTE_CTRL_CMD_SYSTEM_GET_CAPABILITIES = 0xcb330101
|
||||
NV_CONF_COMPUTE_CTRL_CMD_SYSTEM_GET_GPUS_STATE = 0xcb330104
|
||||
NV_CONF_COMPUTE_CTRL_CMD_GPU_GET_NUM_SECURE_CHANNELS = 0xcb33010b
|
||||
NV_CONF_COMPUTE_CTRL_CMD_GPU_GET_KEY_ROTATION_STATE = 0xcb33010c
|
||||
)
|
||||
|
||||
// The following IOCTLs are not found in the OSS repo.
|
||||
const (
|
||||
UNKNOWN_CONTROL_COMMAND_80028B = 0x80028b
|
||||
)
|
||||
805
pkg/abi/nvgpu/frontend.go
Normal file
805
pkg/abi/nvgpu/frontend.go
Normal file
|
|
@ -0,0 +1,805 @@
|
|||
// Copyright 2023 The gVisor Authors.
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
package nvgpu
|
||||
|
||||
import (
|
||||
"github.com/sagernet/gvisor/pkg/marshal"
|
||||
)
|
||||
|
||||
// NV_IOCTL_MAGIC is the "canonical" IOC_TYPE for frontend ioctls.
|
||||
// The driver ignores IOC_TYPE, allowing any value to be passed.
|
||||
const NV_IOCTL_MAGIC = uint32('F')
|
||||
|
||||
// Frontend ioctl numbers.
|
||||
// Note that these are only the IOC_NR part of the ioctl command.
|
||||
const (
|
||||
// From kernel-open/common/inc/nv-ioctl-numbers.h:
|
||||
NV_IOCTL_BASE = 200
|
||||
NV_ESC_CARD_INFO = NV_IOCTL_BASE + 0
|
||||
NV_ESC_REGISTER_FD = NV_IOCTL_BASE + 1
|
||||
NV_ESC_ALLOC_OS_EVENT = NV_IOCTL_BASE + 6
|
||||
NV_ESC_FREE_OS_EVENT = NV_IOCTL_BASE + 7
|
||||
NV_ESC_CHECK_VERSION_STR = NV_IOCTL_BASE + 10
|
||||
NV_ESC_ATTACH_GPUS_TO_FD = NV_IOCTL_BASE + 12
|
||||
NV_ESC_SYS_PARAMS = NV_IOCTL_BASE + 14
|
||||
NV_ESC_WAIT_OPEN_COMPLETE = NV_IOCTL_BASE + 18
|
||||
|
||||
// From kernel-open/common/inc/nv-ioctl-numa.h:
|
||||
NV_ESC_NUMA_INFO = NV_IOCTL_BASE + 15
|
||||
|
||||
// From src/nvidia/arch/nvalloc/unix/include/nv_escape.h:
|
||||
NV_ESC_RM_ALLOC_MEMORY = 0x27
|
||||
NV_ESC_RM_FREE = 0x29
|
||||
NV_ESC_RM_CONTROL = 0x2a
|
||||
NV_ESC_RM_ALLOC = 0x2b
|
||||
NV_ESC_RM_DUP_OBJECT = 0x34
|
||||
NV_ESC_RM_SHARE = 0x35
|
||||
NV_ESC_RM_IDLE_CHANNELS = 0x41
|
||||
NV_ESC_RM_VID_HEAP_CONTROL = 0x4a
|
||||
NV_ESC_RM_MAP_MEMORY = 0x4e
|
||||
NV_ESC_RM_UNMAP_MEMORY = 0x4f
|
||||
NV_ESC_RM_ALLOC_CONTEXT_DMA2 = 0x54
|
||||
NV_ESC_RM_MAP_MEMORY_DMA = 0x57
|
||||
NV_ESC_RM_UNMAP_MEMORY_DMA = 0x58
|
||||
NV_ESC_RM_UPDATE_DEVICE_MAPPING_INFO = 0x5e
|
||||
)
|
||||
|
||||
// Frontend ioctl parameter structs, from src/common/sdk/nvidia/inc/nvos.h or
|
||||
// kernel-open/common/inc/nv-ioctl.h.
|
||||
|
||||
// IoctlRegisterFD is the parameter type for NV_ESC_REGISTER_FD.
|
||||
//
|
||||
// +marshal
|
||||
type IoctlRegisterFD struct {
|
||||
CtlFD int32
|
||||
}
|
||||
|
||||
// IoctlAllocOSEvent is the parameter type for NV_ESC_ALLOC_OS_EVENT.
|
||||
//
|
||||
// +marshal
|
||||
type IoctlAllocOSEvent struct {
|
||||
HClient Handle
|
||||
HDevice Handle
|
||||
FD uint32
|
||||
Status uint32
|
||||
}
|
||||
|
||||
// GetFrontendFD implements HasFrontendFD.GetFrontendFD.
|
||||
func (p *IoctlAllocOSEvent) GetFrontendFD() int32 {
|
||||
return int32(p.FD)
|
||||
}
|
||||
|
||||
// SetFrontendFD implements HasFrontendFD.SetFrontendFD.
|
||||
func (p *IoctlAllocOSEvent) SetFrontendFD(fd int32) {
|
||||
p.FD = uint32(fd)
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (p *IoctlAllocOSEvent) GetStatus() uint32 {
|
||||
return p.Status
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (p *IoctlAllocOSEvent) SetStatus(status uint32) {
|
||||
p.Status = status
|
||||
}
|
||||
|
||||
// IoctlFreeOSEvent is the parameter type for NV_ESC_FREE_OS_EVENT.
|
||||
//
|
||||
// +marshal
|
||||
type IoctlFreeOSEvent struct {
|
||||
HClient Handle
|
||||
HDevice Handle
|
||||
FD uint32
|
||||
Status uint32
|
||||
}
|
||||
|
||||
// GetFrontendFD implements HasFrontendFD.GetFrontendFD.
|
||||
func (p *IoctlFreeOSEvent) GetFrontendFD() int32 {
|
||||
return int32(p.FD)
|
||||
}
|
||||
|
||||
// SetFrontendFD implements HasFrontendFD.SetFrontendFD.
|
||||
func (p *IoctlFreeOSEvent) SetFrontendFD(fd int32) {
|
||||
p.FD = uint32(fd)
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (p *IoctlFreeOSEvent) GetStatus() uint32 {
|
||||
return p.Status
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (p *IoctlFreeOSEvent) SetStatus(status uint32) {
|
||||
p.Status = status
|
||||
}
|
||||
|
||||
// RMAPIVersion is the parameter type for NV_ESC_CHECK_VERSION_STR.
|
||||
//
|
||||
// +marshal
|
||||
type RMAPIVersion struct {
|
||||
Cmd uint32
|
||||
Reply uint32
|
||||
VersionString [64]byte
|
||||
}
|
||||
|
||||
// IoctlSysParams is the parameter type for NV_ESC_SYS_PARAMS.
|
||||
//
|
||||
// +marshal
|
||||
type IoctlSysParams struct {
|
||||
MemblockSize uint64
|
||||
}
|
||||
|
||||
// IoctlWaitOpenComplete is the parameter type for NV_ESC_WAIT_OPEN_COMPLETE.
|
||||
//
|
||||
// +marshal
|
||||
type IoctlWaitOpenComplete struct {
|
||||
Rc int32
|
||||
AdapterStatus uint32
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (p *IoctlWaitOpenComplete) GetStatus() uint32 {
|
||||
return p.AdapterStatus
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (p *IoctlWaitOpenComplete) SetStatus(status uint32) {
|
||||
p.AdapterStatus = status
|
||||
}
|
||||
|
||||
// IoctlNVOS02ParametersWithFD is the parameter type for NV_ESC_RM_ALLOC_MEMORY.
|
||||
//
|
||||
// +marshal
|
||||
type IoctlNVOS02ParametersWithFD struct {
|
||||
Params NVOS02_PARAMETERS
|
||||
FD int32
|
||||
Pad0 [4]byte
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (p *IoctlNVOS02ParametersWithFD) GetStatus() uint32 {
|
||||
return p.Params.Status
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (p *IoctlNVOS02ParametersWithFD) SetStatus(status uint32) {
|
||||
p.Params.Status = status
|
||||
}
|
||||
|
||||
// +marshal
|
||||
type NVOS02_PARAMETERS struct {
|
||||
HRoot Handle
|
||||
HObjectParent Handle
|
||||
HObjectNew Handle
|
||||
HClass ClassID
|
||||
Flags uint32
|
||||
Pad0 [4]byte
|
||||
PMemory P64 // address of application mapping, without indirection
|
||||
Limit uint64
|
||||
Status uint32
|
||||
Pad1 [4]byte
|
||||
}
|
||||
|
||||
// Bitfields in NVOS02_PARAMETERS.Flags:
|
||||
const (
|
||||
NVOS02_FLAGS_ALLOC_SHIFT = 16
|
||||
NVOS02_FLAGS_ALLOC_MASK = 0x3
|
||||
NVOS02_FLAGS_ALLOC_NONE = 0x00000001
|
||||
|
||||
NVOS02_FLAGS_MAPPING_SHIFT = 30
|
||||
NVOS02_FLAGS_MAPPING_MASK = 0x3
|
||||
NVOS02_FLAGS_MAPPING_NO_MAP = 0x00000001
|
||||
)
|
||||
|
||||
// NVOS00_PARAMETERS is the parameter type for NV_ESC_RM_FREE.
|
||||
//
|
||||
// +marshal
|
||||
type NVOS00_PARAMETERS struct {
|
||||
HRoot Handle
|
||||
HObjectParent Handle
|
||||
HObjectOld Handle
|
||||
Status uint32
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (p *NVOS00_PARAMETERS) GetStatus() uint32 {
|
||||
return p.Status
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (p *NVOS00_PARAMETERS) SetStatus(status uint32) {
|
||||
p.Status = status
|
||||
}
|
||||
|
||||
// RmAllocParamType should be implemented by all possible parameter types for
|
||||
// NV_ESC_RM_ALLOC.
|
||||
type RmAllocParamType interface {
|
||||
GetHClass() ClassID
|
||||
GetPAllocParms() P64
|
||||
GetPRightsRequested() P64
|
||||
SetPAllocParms(p P64)
|
||||
SetPRightsRequested(p P64)
|
||||
FromOS64(other NVOS64_PARAMETERS)
|
||||
ToOS64() NVOS64_PARAMETERS
|
||||
GetPointer() uintptr
|
||||
HasStatus
|
||||
marshal.Marshallable
|
||||
}
|
||||
|
||||
// GetRmAllocParamObj returns the appropriate implementation of
|
||||
// RmAllocParamType based on passed parameters.
|
||||
func GetRmAllocParamObj(isNVOS64 bool) RmAllocParamType {
|
||||
if isNVOS64 {
|
||||
return &NVOS64_PARAMETERS{}
|
||||
}
|
||||
return &NVOS21_PARAMETERS{}
|
||||
}
|
||||
|
||||
// NVOS21_PARAMETERS is one possible parameter type for NV_ESC_RM_ALLOC.
|
||||
//
|
||||
// +marshal
|
||||
type NVOS21_PARAMETERS struct {
|
||||
HRoot Handle
|
||||
HObjectParent Handle
|
||||
HObjectNew Handle
|
||||
HClass ClassID
|
||||
PAllocParms P64
|
||||
ParamsSize uint32
|
||||
Status uint32
|
||||
}
|
||||
|
||||
// GetHClass implements RmAllocParamType.GetHClass.
|
||||
func (n *NVOS21_PARAMETERS) GetHClass() ClassID {
|
||||
return n.HClass
|
||||
}
|
||||
|
||||
// GetPAllocParms implements RmAllocParamType.GetPAllocParms.
|
||||
func (n *NVOS21_PARAMETERS) GetPAllocParms() P64 {
|
||||
return n.PAllocParms
|
||||
}
|
||||
|
||||
// GetPRightsRequested implements RmAllocParamType.GetPRightsRequested.
|
||||
func (n *NVOS21_PARAMETERS) GetPRightsRequested() P64 {
|
||||
return 0
|
||||
}
|
||||
|
||||
// SetPAllocParms implements RmAllocParamType.SetPAllocParms.
|
||||
func (n *NVOS21_PARAMETERS) SetPAllocParms(p P64) { n.PAllocParms = p }
|
||||
|
||||
// SetPRightsRequested implements RmAllocParamType.SetPRightsRequested.
|
||||
func (n *NVOS21_PARAMETERS) SetPRightsRequested(p P64) {
|
||||
panic("impossible")
|
||||
}
|
||||
|
||||
// FromOS64 implements RmAllocParamType.FromOS64.
|
||||
func (n *NVOS21_PARAMETERS) FromOS64(other NVOS64_PARAMETERS) {
|
||||
n.HRoot = other.HRoot
|
||||
n.HObjectParent = other.HObjectParent
|
||||
n.HObjectNew = other.HObjectNew
|
||||
n.HClass = other.HClass
|
||||
n.PAllocParms = other.PAllocParms
|
||||
n.ParamsSize = other.ParamsSize
|
||||
n.Status = other.Status
|
||||
}
|
||||
|
||||
// ToOS64 implements RmAllocParamType.ToOS64.
|
||||
func (n *NVOS21_PARAMETERS) ToOS64() NVOS64_PARAMETERS {
|
||||
return NVOS64_PARAMETERS{
|
||||
HRoot: n.HRoot,
|
||||
HObjectParent: n.HObjectParent,
|
||||
HObjectNew: n.HObjectNew,
|
||||
HClass: n.HClass,
|
||||
PAllocParms: n.PAllocParms,
|
||||
ParamsSize: n.ParamsSize,
|
||||
Status: n.Status,
|
||||
}
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (n *NVOS21_PARAMETERS) GetStatus() uint32 {
|
||||
return n.Status
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (n *NVOS21_PARAMETERS) SetStatus(status uint32) {
|
||||
n.Status = status
|
||||
}
|
||||
|
||||
// NVOS55_PARAMETERS is the parameter type for NV_ESC_RM_DUP_OBJECT.
|
||||
//
|
||||
// +marshal
|
||||
type NVOS55_PARAMETERS struct {
|
||||
HClient Handle
|
||||
HParent Handle
|
||||
HObject Handle
|
||||
HClientSrc Handle
|
||||
HObjectSrc Handle
|
||||
Flags uint32
|
||||
Status uint32
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (n *NVOS55_PARAMETERS) GetStatus() uint32 {
|
||||
return n.Status
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (n *NVOS55_PARAMETERS) SetStatus(status uint32) {
|
||||
n.Status = status
|
||||
}
|
||||
|
||||
// NVOS57_PARAMETERS is the parameter type for NV_ESC_RM_SHARE.
|
||||
//
|
||||
// +marshal
|
||||
type NVOS57_PARAMETERS struct {
|
||||
HClient Handle
|
||||
HObject Handle
|
||||
SharePolicy RS_SHARE_POLICY
|
||||
Status uint32
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (n *NVOS57_PARAMETERS) GetStatus() uint32 {
|
||||
return n.Status
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (n *NVOS57_PARAMETERS) SetStatus(status uint32) {
|
||||
n.Status = status
|
||||
}
|
||||
|
||||
// NVOS30_PARAMETERS is the parameter type for NV_ESC_RM_IDLE_CHANNELS.
|
||||
//
|
||||
// +marshal
|
||||
type NVOS30_PARAMETERS struct {
|
||||
Client Handle
|
||||
Device Handle
|
||||
Channel Handle
|
||||
NumChannels uint32
|
||||
|
||||
Clients P64
|
||||
Devices P64
|
||||
Channels P64
|
||||
|
||||
Flags uint32
|
||||
Timeout uint32
|
||||
Status uint32
|
||||
Pad0 [4]byte
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (n *NVOS30_PARAMETERS) GetStatus() uint32 {
|
||||
return n.Status
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (n *NVOS30_PARAMETERS) SetStatus(status uint32) {
|
||||
n.Status = status
|
||||
}
|
||||
|
||||
// NVOS32_PARAMETERS is the parameter type for NV_ESC_RM_VID_HEAP_CONTROL.
|
||||
//
|
||||
// +marshal
|
||||
type NVOS32_PARAMETERS struct {
|
||||
HRoot Handle
|
||||
HObjectParent Handle
|
||||
Function uint32
|
||||
HVASpace Handle
|
||||
IVCHeapNumber int16
|
||||
Pad [2]byte
|
||||
Status uint32
|
||||
Total uint64
|
||||
Free uint64
|
||||
Data [144]byte // union
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (n *NVOS32_PARAMETERS) GetStatus() uint32 {
|
||||
return n.Status
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (n *NVOS32_PARAMETERS) SetStatus(status uint32) {
|
||||
n.Status = status
|
||||
}
|
||||
|
||||
// Possible values for NVOS32Parameters.Function:
|
||||
const (
|
||||
NVOS32_FUNCTION_ALLOC_SIZE = 2
|
||||
)
|
||||
|
||||
// NVOS32AllocSize is the type of NVOS32Parameters.Data for
|
||||
// NVOS32_FUNCTION_ALLOC_SIZE.
|
||||
type NVOS32AllocSize struct {
|
||||
Owner uint32
|
||||
HMemory Handle
|
||||
Type uint32
|
||||
Flags uint32
|
||||
Attr uint32
|
||||
Format uint32
|
||||
ComprCovg uint32
|
||||
ZcullCovg uint32
|
||||
PartitionStride uint32
|
||||
Width uint32
|
||||
Height uint32
|
||||
Pad0 [4]byte
|
||||
Size uint64
|
||||
Alignment uint64
|
||||
Offset uint64
|
||||
Limit uint64
|
||||
Address P64
|
||||
RangeBegin uint64
|
||||
RangeEnd uint64
|
||||
Attr2 uint32
|
||||
CtagOffset uint32
|
||||
}
|
||||
|
||||
// Flags in NVOS32AllocSize.Flags:
|
||||
const (
|
||||
NVOS32_ALLOC_FLAGS_VIRTUAL = 0x00080000
|
||||
)
|
||||
|
||||
// Bitfields in NVOS32AllocSize.Attr:
|
||||
const (
|
||||
NVOS32_ATTR_LOCATION_SHIFT = 25
|
||||
NVOS32_ATTR_LOCATION_MASK = 0x3
|
||||
NVOS32_ATTR_LOCATION_VIDMEM = 0
|
||||
)
|
||||
|
||||
// Bitfields in NVOS32AllocSize.Attr2:
|
||||
const (
|
||||
NVOS32_ATTR2_USE_EGM_SHIFT = 24
|
||||
NVOS32_ATTR2_USE_EGM_MASK = 0x1
|
||||
NVOS32_ATTR2_USE_EGM_FALSE = 0
|
||||
NVOS32_ATTR2_USE_EGM_TRUE = 1
|
||||
)
|
||||
|
||||
// IoctlNVOS33ParametersWithFD is the parameter type for NV_ESC_RM_MAP_MEMORY,
|
||||
// from src/nvidia/arch/nvalloc/unix/include/nv-unix-nvos-params-wrappers.h.
|
||||
//
|
||||
// +marshal
|
||||
type IoctlNVOS33ParametersWithFD struct {
|
||||
Params NVOS33_PARAMETERS
|
||||
FD int32
|
||||
Pad0 [4]byte
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (p *IoctlNVOS33ParametersWithFD) GetStatus() uint32 {
|
||||
return p.Params.Status
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (p *IoctlNVOS33ParametersWithFD) SetStatus(status uint32) {
|
||||
p.Params.Status = status
|
||||
}
|
||||
|
||||
// +marshal
|
||||
type NVOS33_PARAMETERS struct {
|
||||
HClient Handle
|
||||
HDevice Handle
|
||||
HMemory Handle
|
||||
Pad0 [4]byte
|
||||
Offset uint64
|
||||
Length uint64
|
||||
PLinearAddress P64 // address of application mapping, without indirection
|
||||
Status uint32
|
||||
Flags uint32
|
||||
}
|
||||
|
||||
// Bitfields in NVOS33_PARAMETERS.Flags:
|
||||
const (
|
||||
NVOS33_FLAGS_CACHING_TYPE_SHIFT = 23
|
||||
NVOS33_FLAGS_CACHING_TYPE_MASK = 0x7
|
||||
NVOS33_FLAGS_CACHING_TYPE_CACHED = 0
|
||||
NVOS33_FLAGS_CACHING_TYPE_UNCACHED = 1
|
||||
NVOS33_FLAGS_CACHING_TYPE_WRITECOMBINED = 2
|
||||
NVOS33_FLAGS_CACHING_TYPE_WRITEBACK = 5
|
||||
NVOS33_FLAGS_CACHING_TYPE_DEFAULT = 6
|
||||
NVOS33_FLAGS_CACHING_TYPE_UNCACHED_WEAK = 7
|
||||
)
|
||||
|
||||
// NVOS34_PARAMETERS is the parameter type for NV_ESC_RM_UNMAP_MEMORY.
|
||||
//
|
||||
// +marshal
|
||||
type NVOS34_PARAMETERS struct {
|
||||
HClient Handle
|
||||
HDevice Handle
|
||||
HMemory Handle
|
||||
Pad0 [4]byte
|
||||
PLinearAddress P64 // address of application mapping, without indirection
|
||||
Status uint32
|
||||
Flags uint32
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (n *NVOS34_PARAMETERS) GetStatus() uint32 {
|
||||
return n.Status
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (n *NVOS34_PARAMETERS) SetStatus(status uint32) {
|
||||
n.Status = status
|
||||
}
|
||||
|
||||
// NVOS39_PARAMETERS is the parameter type for NV_ESC_RM_ALLOC_CONTEXT_DMA2.
|
||||
//
|
||||
// +marshal
|
||||
type NVOS39_PARAMETERS struct {
|
||||
HObjectParent Handle
|
||||
HSubDevice Handle
|
||||
HObjectNew Handle
|
||||
HClass ClassID
|
||||
Flags uint32
|
||||
Selector uint32
|
||||
HMemory Handle
|
||||
Pad0 [4]byte
|
||||
Offset uint64
|
||||
Limit uint64
|
||||
Status uint32
|
||||
Pad1 [4]byte
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (n *NVOS39_PARAMETERS) GetStatus() uint32 {
|
||||
return n.Status
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (n *NVOS39_PARAMETERS) SetStatus(status uint32) {
|
||||
n.Status = status
|
||||
}
|
||||
|
||||
// NVOS46_PARAMETERS is the parameter type for NV_ESC_RM_MAP_MEMORY_DMA.
|
||||
//
|
||||
// +marshal
|
||||
type NVOS46_PARAMETERS struct {
|
||||
Client Handle
|
||||
Device Handle
|
||||
Dma Handle
|
||||
Memory Handle
|
||||
Offset uint64
|
||||
Length uint64
|
||||
Flags uint32
|
||||
Pad0 [4]byte
|
||||
DmaOffset uint64
|
||||
Status uint32
|
||||
Pad1 [4]byte
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (n *NVOS46_PARAMETERS) GetStatus() uint32 {
|
||||
return n.Status
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (n *NVOS46_PARAMETERS) SetStatus(status uint32) {
|
||||
n.Status = status
|
||||
}
|
||||
|
||||
// NVOS46_PARAMETERS_V580 is the updated version of NVOS46_PARAMETERS since
|
||||
// 580.65.06.
|
||||
//
|
||||
// +marshal
|
||||
type NVOS46_PARAMETERS_V580 struct {
|
||||
Client Handle
|
||||
Device Handle
|
||||
Dma Handle
|
||||
Memory Handle
|
||||
Offset uint64
|
||||
Length uint64
|
||||
Flags uint32
|
||||
Flags2 uint32
|
||||
KindOverride uint32
|
||||
Pad0 [4]byte
|
||||
DmaOffset uint64
|
||||
Status uint32
|
||||
Pad1 [4]byte
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (n *NVOS46_PARAMETERS_V580) GetStatus() uint32 {
|
||||
return n.Status
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (n *NVOS46_PARAMETERS_V580) SetStatus(status uint32) {
|
||||
n.Status = status
|
||||
}
|
||||
|
||||
// NVOS47_PARAMETERS is the parameter type for NV_ESC_RM_UNMAP_MEMORY_DMA.
|
||||
//
|
||||
// +marshal
|
||||
type NVOS47_PARAMETERS struct {
|
||||
Client Handle
|
||||
Device Handle
|
||||
Dma Handle
|
||||
Memory Handle
|
||||
Flags uint32
|
||||
Pad0 [4]byte
|
||||
DmaOffset uint64
|
||||
Status uint32
|
||||
Pad1 [4]byte
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (n *NVOS47_PARAMETERS) GetStatus() uint32 {
|
||||
return n.Status
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (n *NVOS47_PARAMETERS) SetStatus(status uint32) {
|
||||
n.Status = status
|
||||
}
|
||||
|
||||
// NVOS47_PARAMETERS_V550 is the updated version of NVOS47_PARAMETERS since
|
||||
// 550.54.04.
|
||||
//
|
||||
// +marshal
|
||||
type NVOS47_PARAMETERS_V550 struct {
|
||||
Client Handle
|
||||
Device Handle
|
||||
Dma Handle
|
||||
Memory Handle
|
||||
Flags uint32
|
||||
Pad0 [4]byte
|
||||
DmaOffset uint64
|
||||
Size uint64
|
||||
Status uint32
|
||||
Pad1 [4]byte
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (n *NVOS47_PARAMETERS_V550) GetStatus() uint32 {
|
||||
return n.Status
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (n *NVOS47_PARAMETERS_V550) SetStatus(status uint32) {
|
||||
n.Status = status
|
||||
}
|
||||
|
||||
// NVOS54_PARAMETERS is the parameter type for NV_ESC_RM_CONTROL.
|
||||
//
|
||||
// +marshal
|
||||
type NVOS54_PARAMETERS struct {
|
||||
HClient Handle
|
||||
HObject Handle
|
||||
Cmd uint32
|
||||
Flags uint32
|
||||
Params P64
|
||||
ParamsSize uint32
|
||||
Status uint32
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (n *NVOS54_PARAMETERS) GetStatus() uint32 {
|
||||
return n.Status
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (n *NVOS54_PARAMETERS) SetStatus(status uint32) {
|
||||
n.Status = status
|
||||
}
|
||||
|
||||
// NVOS56_PARAMETERS is the parameter type for NV_ESC_RM_UPDATE_DEVICE_MAPPING_INFO.
|
||||
//
|
||||
// +marshal
|
||||
type NVOS56_PARAMETERS struct {
|
||||
HClient Handle
|
||||
HDevice Handle
|
||||
HMemory Handle
|
||||
Pad0 [4]byte
|
||||
POldCPUAddress P64
|
||||
PNewCPUAddress P64
|
||||
Status uint32
|
||||
Pad1 [4]byte
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (n *NVOS56_PARAMETERS) GetStatus() uint32 {
|
||||
return n.Status
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (n *NVOS56_PARAMETERS) SetStatus(status uint32) {
|
||||
n.Status = status
|
||||
}
|
||||
|
||||
// NVOS64_PARAMETERS is one possible parameter type for NV_ESC_RM_ALLOC.
|
||||
//
|
||||
// +marshal
|
||||
// +stateify savable
|
||||
type NVOS64_PARAMETERS struct {
|
||||
HRoot Handle
|
||||
HObjectParent Handle
|
||||
HObjectNew Handle
|
||||
HClass ClassID
|
||||
PAllocParms P64
|
||||
PRightsRequested P64
|
||||
ParamsSize uint32
|
||||
Flags uint32
|
||||
Status uint32
|
||||
_ uint32
|
||||
}
|
||||
|
||||
// GetHClass implements RmAllocParamType.GetHClass.
|
||||
func (n *NVOS64_PARAMETERS) GetHClass() ClassID {
|
||||
return n.HClass
|
||||
}
|
||||
|
||||
// GetPAllocParms implements RmAllocParamType.GetPAllocParms.
|
||||
func (n *NVOS64_PARAMETERS) GetPAllocParms() P64 {
|
||||
return n.PAllocParms
|
||||
}
|
||||
|
||||
// GetPRightsRequested implements RmAllocParamType.GetPRightsRequested.
|
||||
func (n *NVOS64_PARAMETERS) GetPRightsRequested() P64 {
|
||||
return n.PRightsRequested
|
||||
}
|
||||
|
||||
// SetPAllocParms implements RmAllocParamType.SetPAllocParms.
|
||||
func (n *NVOS64_PARAMETERS) SetPAllocParms(p P64) { n.PAllocParms = p }
|
||||
|
||||
// SetPRightsRequested implements RmAllocParamType.SetPRightsRequested.
|
||||
func (n *NVOS64_PARAMETERS) SetPRightsRequested(p P64) { n.PRightsRequested = p }
|
||||
|
||||
// FromOS64 implements RmAllocParamType.FromOS64.
|
||||
func (n *NVOS64_PARAMETERS) FromOS64(other NVOS64_PARAMETERS) { *n = other }
|
||||
|
||||
// ToOS64 implements RmAllocParamType.ToOS64.
|
||||
func (n *NVOS64_PARAMETERS) ToOS64() NVOS64_PARAMETERS { return *n }
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (n *NVOS64_PARAMETERS) GetStatus() uint32 {
|
||||
return n.Status
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (n *NVOS64_PARAMETERS) SetStatus(status uint32) {
|
||||
n.Status = status
|
||||
}
|
||||
|
||||
// HasFrontendFD is a type constraint for parameter structs containing a
|
||||
// frontend FD field. This is necessary because, as of this writing (Go 1.20),
|
||||
// there is no way to enable field access using a Go type constraint.
|
||||
type HasFrontendFD interface {
|
||||
GetFrontendFD() int32
|
||||
SetFrontendFD(int32)
|
||||
}
|
||||
|
||||
// Frontend ioctl parameter struct sizes.
|
||||
var (
|
||||
SizeofIoctlRegisterFD = uint32((*IoctlRegisterFD)(nil).SizeBytes())
|
||||
SizeofIoctlAllocOSEvent = uint32((*IoctlAllocOSEvent)(nil).SizeBytes())
|
||||
SizeofIoctlFreeOSEvent = uint32((*IoctlFreeOSEvent)(nil).SizeBytes())
|
||||
SizeofRMAPIVersion = uint32((*RMAPIVersion)(nil).SizeBytes())
|
||||
SizeofIoctlSysParams = uint32((*IoctlSysParams)(nil).SizeBytes())
|
||||
SizeofIoctlWaitOpenComplete = uint32((*IoctlWaitOpenComplete)(nil).SizeBytes())
|
||||
SizeofIoctlNVOS02ParametersWithFD = uint32((*IoctlNVOS02ParametersWithFD)(nil).SizeBytes())
|
||||
SizeofNVOS00Parameters = uint32((*NVOS00_PARAMETERS)(nil).SizeBytes())
|
||||
SizeofNVOS21Parameters = uint32((*NVOS21_PARAMETERS)(nil).SizeBytes())
|
||||
SizeofIoctlNVOS33ParametersWithFD = uint32((*IoctlNVOS33ParametersWithFD)(nil).SizeBytes())
|
||||
SizeofNVOS30Parameters = uint32((*NVOS30_PARAMETERS)(nil).SizeBytes())
|
||||
SizeofNVOS32Parameters = uint32((*NVOS32_PARAMETERS)(nil).SizeBytes())
|
||||
SizeofNVOS34Parameters = uint32((*NVOS34_PARAMETERS)(nil).SizeBytes())
|
||||
SizeofNVOS39Parameters = uint32((*NVOS39_PARAMETERS)(nil).SizeBytes())
|
||||
SizeofNVOS54Parameters = uint32((*NVOS54_PARAMETERS)(nil).SizeBytes())
|
||||
SizeofNVOS55Parameters = uint32((*NVOS55_PARAMETERS)(nil).SizeBytes())
|
||||
SizeofNVOS56Parameters = uint32((*NVOS56_PARAMETERS)(nil).SizeBytes())
|
||||
SizeofNVOS57Parameters = uint32((*NVOS57_PARAMETERS)(nil).SizeBytes())
|
||||
SizeofNVOS64Parameters = uint32((*NVOS64_PARAMETERS)(nil).SizeBytes())
|
||||
)
|
||||
27
pkg/abi/nvgpu/frontend_unsafe.go
Normal file
27
pkg/abi/nvgpu/frontend_unsafe.go
Normal file
|
|
@ -0,0 +1,27 @@
|
|||
// Copyright 2023 The gVisor Authors.
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
package nvgpu
|
||||
|
||||
import "unsafe"
|
||||
|
||||
// GetPointer implements RmAllocParamType.GetPointer.
|
||||
func (n *NVOS21_PARAMETERS) GetPointer() uintptr {
|
||||
return uintptr(unsafe.Pointer(n))
|
||||
}
|
||||
|
||||
// GetPointer implements RmAllocParamType.GetPointer.
|
||||
func (n *NVOS64_PARAMETERS) GetPointer() uintptr {
|
||||
return uintptr(unsafe.Pointer(n))
|
||||
}
|
||||
92
pkg/abi/nvgpu/nvgpu.go
Normal file
92
pkg/abi/nvgpu/nvgpu.go
Normal file
|
|
@ -0,0 +1,92 @@
|
|||
// Copyright 2023 The gVisor Authors.
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
// Package nvgpu tracks the ABI of the Nvidia GPU Linux kernel driver:
|
||||
// https://github.com/NVIDIA/open-gpu-kernel-modules
|
||||
package nvgpu
|
||||
|
||||
import (
|
||||
"fmt"
|
||||
)
|
||||
|
||||
// Device numbers.
|
||||
const (
|
||||
NV_MAJOR_DEVICE_NUMBER = 195 // from kernel-open/common/inc/nv.h
|
||||
NV_CONTROL_DEVICE_MINOR = 255 // from kernel-open/common/inc/nv-linux.h
|
||||
NVIDIA_UVM_PRIMARY_MINOR_NUMBER = 0 // from kernel-open/nvidia-uvm/uvm_common.h
|
||||
)
|
||||
|
||||
// Handle is NvHandle, from src/common/sdk/nvidia/inc/nvtypes.h.
|
||||
//
|
||||
// +marshal
|
||||
// +stateify savable
|
||||
type Handle struct {
|
||||
Val uint32
|
||||
}
|
||||
|
||||
// String implements fmt.Stringer.String.
|
||||
func (h Handle) String() string {
|
||||
return fmt.Sprintf("%#x", h.Val)
|
||||
}
|
||||
|
||||
// P64 is NvP64, from src/common/sdk/nvidia/inc/nvtypes.h.
|
||||
//
|
||||
// +marshal
|
||||
type P64 uint64
|
||||
|
||||
// From src/common/sdk/nvidia/inc/nvlimits.h:
|
||||
const (
|
||||
NV_MAX_DEVICES = 32
|
||||
NV_MAX_SUBDEVICES = 8
|
||||
)
|
||||
|
||||
// From src/common/sdk/nvidia/inc/alloc/alloc_channel.h.
|
||||
const (
|
||||
CC_CHAN_ALLOC_IV_SIZE_DWORD = 3
|
||||
CC_CHAN_ALLOC_NONCE_SIZE_DWORD = 8
|
||||
)
|
||||
|
||||
// RS_ACCESS_MASK is RS_ACCESS_MASK, from
|
||||
// src/common/sdk/nvidia/inc/rs_access.h.
|
||||
//
|
||||
// +marshal
|
||||
// +stateify savable
|
||||
type RS_ACCESS_MASK struct {
|
||||
Limbs [SDK_RS_ACCESS_MAX_LIMBS]uint32 // RsAccessLimb
|
||||
}
|
||||
|
||||
const SDK_RS_ACCESS_MAX_LIMBS = 1
|
||||
|
||||
// RS_SHARE_POLICY is RS_SHARE_POLICY, from
|
||||
// src/common/sdk/nvidia/inc/rs_access.h.
|
||||
//
|
||||
// +marshal
|
||||
type RS_SHARE_POLICY struct {
|
||||
Target uint32
|
||||
AccessMask RS_ACCESS_MASK
|
||||
Type uint16
|
||||
Action uint8
|
||||
Pad [1]byte
|
||||
}
|
||||
|
||||
// NvUUID is defined in src/common/inc/nvCpuUuid.h.
|
||||
//
|
||||
// +marshal
|
||||
type NvUUID [16]uint8
|
||||
|
||||
// HasStatus is an interface for parameter structs that have a Status field.
|
||||
type HasStatus interface {
|
||||
GetStatus() uint32
|
||||
SetStatus(status uint32)
|
||||
}
|
||||
17491
pkg/abi/nvgpu/nvgpu_abi_autogen_unsafe.go
Normal file
17491
pkg/abi/nvgpu/nvgpu_abi_autogen_unsafe.go
Normal file
File diff suppressed because it is too large
Load diff
114
pkg/abi/nvgpu/nvgpu_state_autogen.go
Normal file
114
pkg/abi/nvgpu/nvgpu_state_autogen.go
Normal file
|
|
@ -0,0 +1,114 @@
|
|||
// automatically generated by stateify.
|
||||
|
||||
package nvgpu
|
||||
|
||||
import (
|
||||
"context"
|
||||
|
||||
"github.com/sagernet/gvisor/pkg/state"
|
||||
)
|
||||
|
||||
func (n *NVOS64_PARAMETERS) StateTypeName() string {
|
||||
return "pkg/abi/nvgpu.NVOS64_PARAMETERS"
|
||||
}
|
||||
|
||||
func (n *NVOS64_PARAMETERS) StateFields() []string {
|
||||
return []string{
|
||||
"HRoot",
|
||||
"HObjectParent",
|
||||
"HObjectNew",
|
||||
"HClass",
|
||||
"PAllocParms",
|
||||
"PRightsRequested",
|
||||
"ParamsSize",
|
||||
"Flags",
|
||||
"Status",
|
||||
}
|
||||
}
|
||||
|
||||
func (n *NVOS64_PARAMETERS) beforeSave() {}
|
||||
|
||||
// +checklocksignore
|
||||
func (n *NVOS64_PARAMETERS) StateSave(stateSinkObject state.Sink) {
|
||||
n.beforeSave()
|
||||
stateSinkObject.Save(0, &n.HRoot)
|
||||
stateSinkObject.Save(1, &n.HObjectParent)
|
||||
stateSinkObject.Save(2, &n.HObjectNew)
|
||||
stateSinkObject.Save(3, &n.HClass)
|
||||
stateSinkObject.Save(4, &n.PAllocParms)
|
||||
stateSinkObject.Save(5, &n.PRightsRequested)
|
||||
stateSinkObject.Save(6, &n.ParamsSize)
|
||||
stateSinkObject.Save(7, &n.Flags)
|
||||
stateSinkObject.Save(8, &n.Status)
|
||||
}
|
||||
|
||||
func (n *NVOS64_PARAMETERS) afterLoad(context.Context) {}
|
||||
|
||||
// +checklocksignore
|
||||
func (n *NVOS64_PARAMETERS) StateLoad(ctx context.Context, stateSourceObject state.Source) {
|
||||
stateSourceObject.Load(0, &n.HRoot)
|
||||
stateSourceObject.Load(1, &n.HObjectParent)
|
||||
stateSourceObject.Load(2, &n.HObjectNew)
|
||||
stateSourceObject.Load(3, &n.HClass)
|
||||
stateSourceObject.Load(4, &n.PAllocParms)
|
||||
stateSourceObject.Load(5, &n.PRightsRequested)
|
||||
stateSourceObject.Load(6, &n.ParamsSize)
|
||||
stateSourceObject.Load(7, &n.Flags)
|
||||
stateSourceObject.Load(8, &n.Status)
|
||||
}
|
||||
|
||||
func (h *Handle) StateTypeName() string {
|
||||
return "pkg/abi/nvgpu.Handle"
|
||||
}
|
||||
|
||||
func (h *Handle) StateFields() []string {
|
||||
return []string{
|
||||
"Val",
|
||||
}
|
||||
}
|
||||
|
||||
func (h *Handle) beforeSave() {}
|
||||
|
||||
// +checklocksignore
|
||||
func (h *Handle) StateSave(stateSinkObject state.Sink) {
|
||||
h.beforeSave()
|
||||
stateSinkObject.Save(0, &h.Val)
|
||||
}
|
||||
|
||||
func (h *Handle) afterLoad(context.Context) {}
|
||||
|
||||
// +checklocksignore
|
||||
func (h *Handle) StateLoad(ctx context.Context, stateSourceObject state.Source) {
|
||||
stateSourceObject.Load(0, &h.Val)
|
||||
}
|
||||
|
||||
func (r *RS_ACCESS_MASK) StateTypeName() string {
|
||||
return "pkg/abi/nvgpu.RS_ACCESS_MASK"
|
||||
}
|
||||
|
||||
func (r *RS_ACCESS_MASK) StateFields() []string {
|
||||
return []string{
|
||||
"Limbs",
|
||||
}
|
||||
}
|
||||
|
||||
func (r *RS_ACCESS_MASK) beforeSave() {}
|
||||
|
||||
// +checklocksignore
|
||||
func (r *RS_ACCESS_MASK) StateSave(stateSinkObject state.Sink) {
|
||||
r.beforeSave()
|
||||
stateSinkObject.Save(0, &r.Limbs)
|
||||
}
|
||||
|
||||
func (r *RS_ACCESS_MASK) afterLoad(context.Context) {}
|
||||
|
||||
// +checklocksignore
|
||||
func (r *RS_ACCESS_MASK) StateLoad(ctx context.Context, stateSourceObject state.Source) {
|
||||
stateSourceObject.Load(0, &r.Limbs)
|
||||
}
|
||||
|
||||
func init() {
|
||||
state.Register((*NVOS64_PARAMETERS)(nil))
|
||||
state.Register((*Handle)(nil))
|
||||
state.Register((*RS_ACCESS_MASK)(nil))
|
||||
}
|
||||
3
pkg/abi/nvgpu/nvgpu_unsafe_abi_autogen_unsafe.go
Normal file
3
pkg/abi/nvgpu/nvgpu_unsafe_abi_autogen_unsafe.go
Normal file
|
|
@ -0,0 +1,3 @@
|
|||
// Automatically generated marshal implementation. See tools/go_marshal.
|
||||
|
||||
package nvgpu
|
||||
3
pkg/abi/nvgpu/nvgpu_unsafe_state_autogen.go
Normal file
3
pkg/abi/nvgpu/nvgpu_unsafe_state_autogen.go
Normal file
|
|
@ -0,0 +1,3 @@
|
|||
// automatically generated by stateify.
|
||||
|
||||
package nvgpu
|
||||
26
pkg/abi/nvgpu/status.go
Normal file
26
pkg/abi/nvgpu/status.go
Normal file
|
|
@ -0,0 +1,26 @@
|
|||
// Copyright 2023 The gVisor Authors.
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
package nvgpu
|
||||
|
||||
// Status codes, from src/common/sdk/nvidia/inc/nvstatuscodes.h.
|
||||
const (
|
||||
NV_OK = 0x00000000
|
||||
NV_ERR_INVALID_ADDRESS = 0x0000001e
|
||||
NV_ERR_INVALID_ARGUMENT = 0x0000001f
|
||||
NV_ERR_INVALID_CLASS = 0x00000022
|
||||
NV_ERR_INVALID_CLIENT = 0x00000023
|
||||
NV_ERR_INVALID_LIMIT = 0x0000002e
|
||||
NV_ERR_NOT_SUPPORTED = 0x00000056
|
||||
)
|
||||
778
pkg/abi/nvgpu/uvm.go
Normal file
778
pkg/abi/nvgpu/uvm.go
Normal file
|
|
@ -0,0 +1,778 @@
|
|||
// Copyright 2023 The gVisor Authors.
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
package nvgpu
|
||||
|
||||
// UVM ioctl commands.
|
||||
const (
|
||||
// From kernel-open/nvidia-uvm/uvm_linux_ioctl.h:
|
||||
UVM_INITIALIZE = 0x30000001
|
||||
UVM_DEINITIALIZE = 0x30000002
|
||||
|
||||
// From kernel-open/nvidia-uvm/uvm_ioctl.h:
|
||||
UVM_CREATE_RANGE_GROUP = 23
|
||||
UVM_DESTROY_RANGE_GROUP = 24
|
||||
UVM_REGISTER_GPU_VASPACE = 25
|
||||
UVM_UNREGISTER_GPU_VASPACE = 26
|
||||
UVM_REGISTER_CHANNEL = 27
|
||||
UVM_UNREGISTER_CHANNEL = 28
|
||||
UVM_ENABLE_PEER_ACCESS = 29
|
||||
UVM_DISABLE_PEER_ACCESS = 30
|
||||
UVM_SET_RANGE_GROUP = 31
|
||||
UVM_MAP_EXTERNAL_ALLOCATION = 33
|
||||
UVM_FREE = 34
|
||||
UVM_REGISTER_GPU = 37
|
||||
UVM_UNREGISTER_GPU = 38
|
||||
UVM_PAGEABLE_MEM_ACCESS = 39
|
||||
UVM_SET_PREFERRED_LOCATION = 42
|
||||
UVM_UNSET_PREFERRED_LOCATION = 43
|
||||
UVM_DISABLE_READ_DUPLICATION = 45
|
||||
UVM_UNSET_ACCESSED_BY = 47
|
||||
UVM_MIGRATE = 51
|
||||
UVM_MIGRATE_RANGE_GROUP = 53
|
||||
UVM_TOOLS_READ_PROCESS_MEMORY = 62
|
||||
UVM_TOOLS_WRITE_PROCESS_MEMORY = 63
|
||||
UVM_MAP_DYNAMIC_PARALLELISM_REGION = 65
|
||||
UVM_UNMAP_EXTERNAL = 66
|
||||
UVM_ALLOC_SEMAPHORE_POOL = 68
|
||||
UVM_PAGEABLE_MEM_ACCESS_ON_GPU = 70
|
||||
UVM_VALIDATE_VA_RANGE = 72
|
||||
UVM_CREATE_EXTERNAL_RANGE = 73
|
||||
UVM_MM_INITIALIZE = 75
|
||||
)
|
||||
|
||||
// +marshal
|
||||
type UVM_INITIALIZE_PARAMS struct {
|
||||
Flags uint64
|
||||
RMStatus uint32
|
||||
Pad0 [4]byte
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (p *UVM_INITIALIZE_PARAMS) GetStatus() uint32 {
|
||||
return p.RMStatus
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (p *UVM_INITIALIZE_PARAMS) SetStatus(status uint32) {
|
||||
p.RMStatus = status
|
||||
}
|
||||
|
||||
// UVM_INITIALIZE_PARAMS flags, from kernel-open/nvidia-uvm/uvm_types.h.
|
||||
const (
|
||||
UVM_INIT_FLAGS_MULTI_PROCESS_SHARING_MODE = 0x2
|
||||
)
|
||||
|
||||
// +marshal
|
||||
type UVM_CREATE_RANGE_GROUP_PARAMS struct {
|
||||
RangeGroupID uint64
|
||||
RMStatus uint32
|
||||
Pad0 [4]byte
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (p *UVM_CREATE_RANGE_GROUP_PARAMS) GetStatus() uint32 {
|
||||
return p.RMStatus
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (p *UVM_CREATE_RANGE_GROUP_PARAMS) SetStatus(status uint32) {
|
||||
p.RMStatus = status
|
||||
}
|
||||
|
||||
// +marshal
|
||||
type UVM_DESTROY_RANGE_GROUP_PARAMS struct {
|
||||
RangeGroupID uint64
|
||||
RMStatus uint32
|
||||
Pad0 [4]byte
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (p *UVM_DESTROY_RANGE_GROUP_PARAMS) GetStatus() uint32 {
|
||||
return p.RMStatus
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (p *UVM_DESTROY_RANGE_GROUP_PARAMS) SetStatus(status uint32) {
|
||||
p.RMStatus = status
|
||||
}
|
||||
|
||||
// +marshal
|
||||
type UVM_REGISTER_GPU_VASPACE_PARAMS struct {
|
||||
GPUUUID NvUUID
|
||||
RMCtrlFD int32
|
||||
HClient Handle
|
||||
HVASpace Handle
|
||||
RMStatus uint32
|
||||
}
|
||||
|
||||
// GetFrontendFD implements HasFrontendFD.GetFrontendFD.
|
||||
func (p *UVM_REGISTER_GPU_VASPACE_PARAMS) GetFrontendFD() int32 {
|
||||
return p.RMCtrlFD
|
||||
}
|
||||
|
||||
// SetFrontendFD implements HasFrontendFD.SetFrontendFD.
|
||||
func (p *UVM_REGISTER_GPU_VASPACE_PARAMS) SetFrontendFD(fd int32) {
|
||||
p.RMCtrlFD = fd
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (p *UVM_REGISTER_GPU_VASPACE_PARAMS) GetStatus() uint32 {
|
||||
return p.RMStatus
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (p *UVM_REGISTER_GPU_VASPACE_PARAMS) SetStatus(status uint32) {
|
||||
p.RMStatus = status
|
||||
}
|
||||
|
||||
// +marshal
|
||||
type UVM_UNREGISTER_GPU_VASPACE_PARAMS struct {
|
||||
GPUUUID NvUUID
|
||||
RMStatus uint32
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (p *UVM_UNREGISTER_GPU_VASPACE_PARAMS) GetStatus() uint32 {
|
||||
return p.RMStatus
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (p *UVM_UNREGISTER_GPU_VASPACE_PARAMS) SetStatus(status uint32) {
|
||||
p.RMStatus = status
|
||||
}
|
||||
|
||||
// +marshal
|
||||
type UVM_REGISTER_CHANNEL_PARAMS struct {
|
||||
GPUUUID NvUUID
|
||||
RMCtrlFD int32
|
||||
HClient Handle
|
||||
HChannel Handle
|
||||
Pad [4]byte
|
||||
Base uint64
|
||||
Length uint64
|
||||
RMStatus uint32
|
||||
Pad0 [4]byte
|
||||
}
|
||||
|
||||
// GetFrontendFD implements HasFrontendFD.GetFrontendFD.
|
||||
func (p *UVM_REGISTER_CHANNEL_PARAMS) GetFrontendFD() int32 {
|
||||
return p.RMCtrlFD
|
||||
}
|
||||
|
||||
// SetFrontendFD implements HasFrontendFD.SetFrontendFD.
|
||||
func (p *UVM_REGISTER_CHANNEL_PARAMS) SetFrontendFD(fd int32) {
|
||||
p.RMCtrlFD = fd
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (p *UVM_REGISTER_CHANNEL_PARAMS) GetStatus() uint32 {
|
||||
return p.RMStatus
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (p *UVM_REGISTER_CHANNEL_PARAMS) SetStatus(status uint32) {
|
||||
p.RMStatus = status
|
||||
}
|
||||
|
||||
// +marshal
|
||||
type UVM_UNREGISTER_CHANNEL_PARAMS struct {
|
||||
GPUUUID NvUUID
|
||||
HClient Handle
|
||||
HChannel Handle
|
||||
RMStatus uint32
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (p *UVM_UNREGISTER_CHANNEL_PARAMS) GetStatus() uint32 {
|
||||
return p.RMStatus
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (p *UVM_UNREGISTER_CHANNEL_PARAMS) SetStatus(status uint32) {
|
||||
p.RMStatus = status
|
||||
}
|
||||
|
||||
// +marshal
|
||||
type UVM_ENABLE_PEER_ACCESS_PARAMS struct {
|
||||
GPUUUIDA NvUUID
|
||||
GPUUUIDB NvUUID
|
||||
RMStatus uint32
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (p *UVM_ENABLE_PEER_ACCESS_PARAMS) GetStatus() uint32 {
|
||||
return p.RMStatus
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (p *UVM_ENABLE_PEER_ACCESS_PARAMS) SetStatus(status uint32) {
|
||||
p.RMStatus = status
|
||||
}
|
||||
|
||||
// +marshal
|
||||
type UVM_DISABLE_PEER_ACCESS_PARAMS struct {
|
||||
GPUUUIDA NvUUID
|
||||
GPUUUIDB NvUUID
|
||||
RMStatus uint32
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (p *UVM_DISABLE_PEER_ACCESS_PARAMS) GetStatus() uint32 {
|
||||
return p.RMStatus
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (p *UVM_DISABLE_PEER_ACCESS_PARAMS) SetStatus(status uint32) {
|
||||
p.RMStatus = status
|
||||
}
|
||||
|
||||
// +marshal
|
||||
type UVM_SET_RANGE_GROUP_PARAMS struct {
|
||||
RangeGroupID uint64
|
||||
RequestedBase uint64
|
||||
Length uint64
|
||||
RMStatus uint32
|
||||
Pad0 [4]byte
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (p *UVM_SET_RANGE_GROUP_PARAMS) GetStatus() uint32 {
|
||||
return p.RMStatus
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (p *UVM_SET_RANGE_GROUP_PARAMS) SetStatus(status uint32) {
|
||||
p.RMStatus = status
|
||||
}
|
||||
|
||||
// +marshal
|
||||
type UVM_MAP_EXTERNAL_ALLOCATION_PARAMS struct {
|
||||
Base uint64
|
||||
Length uint64
|
||||
Offset uint64
|
||||
PerGPUAttributes [UVM_MAX_GPUS]UvmGpuMappingAttributes
|
||||
GPUAttributesCount uint64
|
||||
RMCtrlFD int32
|
||||
HClient uint32 // These are treated like NvHandle, but the driver uses NvU32.
|
||||
HMemory uint32 // These are treated like NvHandle, but the driver uses NvU32.
|
||||
RMStatus uint32
|
||||
}
|
||||
|
||||
// GetFrontendFD implements HasFrontendFD.GetFrontendFD.
|
||||
func (p *UVM_MAP_EXTERNAL_ALLOCATION_PARAMS) GetFrontendFD() int32 {
|
||||
return p.RMCtrlFD
|
||||
}
|
||||
|
||||
// SetFrontendFD implements HasFrontendFD.SetFrontendFD.
|
||||
func (p *UVM_MAP_EXTERNAL_ALLOCATION_PARAMS) SetFrontendFD(fd int32) {
|
||||
p.RMCtrlFD = fd
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (p *UVM_MAP_EXTERNAL_ALLOCATION_PARAMS) GetStatus() uint32 {
|
||||
return p.RMStatus
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (p *UVM_MAP_EXTERNAL_ALLOCATION_PARAMS) SetStatus(status uint32) {
|
||||
p.RMStatus = status
|
||||
}
|
||||
|
||||
// +marshal
|
||||
type UVM_MAP_EXTERNAL_ALLOCATION_PARAMS_V550 struct {
|
||||
Base uint64
|
||||
Length uint64
|
||||
Offset uint64
|
||||
PerGPUAttributes [UVM_MAX_GPUS_V2]UvmGpuMappingAttributes
|
||||
GPUAttributesCount uint64
|
||||
RMCtrlFD int32
|
||||
HClient uint32 // These are treated like NvHandle, but the driver uses NvU32.
|
||||
HMemory uint32 // These are treated like NvHandle, but the driver uses NvU32.
|
||||
RMStatus uint32
|
||||
}
|
||||
|
||||
// GetFrontendFD implements HasFrontendFD.GetFrontendFD.
|
||||
func (p *UVM_MAP_EXTERNAL_ALLOCATION_PARAMS_V550) GetFrontendFD() int32 {
|
||||
return p.RMCtrlFD
|
||||
}
|
||||
|
||||
// SetFrontendFD implements HasFrontendFD.SetFrontendFD.
|
||||
func (p *UVM_MAP_EXTERNAL_ALLOCATION_PARAMS_V550) SetFrontendFD(fd int32) {
|
||||
p.RMCtrlFD = fd
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (p *UVM_MAP_EXTERNAL_ALLOCATION_PARAMS_V550) GetStatus() uint32 {
|
||||
return p.RMStatus
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (p *UVM_MAP_EXTERNAL_ALLOCATION_PARAMS_V550) SetStatus(status uint32) {
|
||||
p.RMStatus = status
|
||||
}
|
||||
|
||||
// +marshal
|
||||
type UVM_FREE_PARAMS struct {
|
||||
Base uint64
|
||||
Length uint64
|
||||
RMStatus uint32
|
||||
Pad0 [4]byte
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (p *UVM_FREE_PARAMS) GetStatus() uint32 {
|
||||
return p.RMStatus
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (p *UVM_FREE_PARAMS) SetStatus(status uint32) {
|
||||
p.RMStatus = status
|
||||
}
|
||||
|
||||
// +marshal
|
||||
type UVM_REGISTER_GPU_PARAMS struct {
|
||||
GPUUUID NvUUID
|
||||
NumaEnabled uint8
|
||||
Pad [3]byte
|
||||
NumaNodeID int32
|
||||
RMCtrlFD int32
|
||||
HClient Handle
|
||||
HSMCPartRef Handle
|
||||
RMStatus uint32
|
||||
}
|
||||
|
||||
// GetFrontendFD implements HasFrontendFD.GetFrontendFD.
|
||||
func (p *UVM_REGISTER_GPU_PARAMS) GetFrontendFD() int32 {
|
||||
return p.RMCtrlFD
|
||||
}
|
||||
|
||||
// SetFrontendFD implements HasFrontendFD.SetFrontendFD.
|
||||
func (p *UVM_REGISTER_GPU_PARAMS) SetFrontendFD(fd int32) {
|
||||
p.RMCtrlFD = fd
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (p *UVM_REGISTER_GPU_PARAMS) GetStatus() uint32 {
|
||||
return p.RMStatus
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (p *UVM_REGISTER_GPU_PARAMS) SetStatus(status uint32) {
|
||||
p.RMStatus = status
|
||||
}
|
||||
|
||||
// +marshal
|
||||
type UVM_UNREGISTER_GPU_PARAMS struct {
|
||||
GPUUUID NvUUID
|
||||
RMStatus uint32
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (p *UVM_UNREGISTER_GPU_PARAMS) GetStatus() uint32 {
|
||||
return p.RMStatus
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (p *UVM_UNREGISTER_GPU_PARAMS) SetStatus(status uint32) {
|
||||
p.RMStatus = status
|
||||
}
|
||||
|
||||
// +marshal
|
||||
type UVM_PAGEABLE_MEM_ACCESS_PARAMS struct {
|
||||
PageableMemAccess uint8
|
||||
Pad [3]byte
|
||||
RMStatus uint32
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (p *UVM_PAGEABLE_MEM_ACCESS_PARAMS) GetStatus() uint32 {
|
||||
return p.RMStatus
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (p *UVM_PAGEABLE_MEM_ACCESS_PARAMS) SetStatus(status uint32) {
|
||||
p.RMStatus = status
|
||||
}
|
||||
|
||||
// +marshal
|
||||
type UVM_SET_PREFERRED_LOCATION_PARAMS struct {
|
||||
RequestedBase uint64
|
||||
Length uint64
|
||||
PreferredLocation NvUUID
|
||||
RMStatus uint32
|
||||
Pad0 [4]byte
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (p *UVM_SET_PREFERRED_LOCATION_PARAMS) GetStatus() uint32 {
|
||||
return p.RMStatus
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (p *UVM_SET_PREFERRED_LOCATION_PARAMS) SetStatus(status uint32) {
|
||||
p.RMStatus = status
|
||||
}
|
||||
|
||||
// +marshal
|
||||
type UVM_SET_PREFERRED_LOCATION_PARAMS_V550 struct {
|
||||
RequestedBase uint64
|
||||
Length uint64
|
||||
PreferredLocation NvUUID
|
||||
PreferredCPUNumaNode int32
|
||||
RMStatus uint32
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (p *UVM_SET_PREFERRED_LOCATION_PARAMS_V550) GetStatus() uint32 {
|
||||
return p.RMStatus
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (p *UVM_SET_PREFERRED_LOCATION_PARAMS_V550) SetStatus(status uint32) {
|
||||
p.RMStatus = status
|
||||
}
|
||||
|
||||
// +marshal
|
||||
type UVM_UNSET_PREFERRED_LOCATION_PARAMS struct {
|
||||
RequestedBase uint64
|
||||
Length uint64
|
||||
RMStatus uint32
|
||||
Pad0 [4]byte
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (p *UVM_UNSET_PREFERRED_LOCATION_PARAMS) GetStatus() uint32 {
|
||||
return p.RMStatus
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (p *UVM_UNSET_PREFERRED_LOCATION_PARAMS) SetStatus(status uint32) {
|
||||
p.RMStatus = status
|
||||
}
|
||||
|
||||
// +marshal
|
||||
type UVM_DISABLE_READ_DUPLICATION_PARAMS struct {
|
||||
RequestedBase uint64
|
||||
Length uint64
|
||||
RMStatus uint32
|
||||
Pad0 [4]byte
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (p *UVM_DISABLE_READ_DUPLICATION_PARAMS) GetStatus() uint32 {
|
||||
return p.RMStatus
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (p *UVM_DISABLE_READ_DUPLICATION_PARAMS) SetStatus(status uint32) {
|
||||
p.RMStatus = status
|
||||
}
|
||||
|
||||
// +marshal
|
||||
type UVM_UNSET_ACCESSED_BY_PARAMS struct {
|
||||
RequestedBase uint64
|
||||
Length uint64
|
||||
AccessedByUUID NvUUID
|
||||
RMStatus uint32
|
||||
Pad0 [4]byte
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (p *UVM_UNSET_ACCESSED_BY_PARAMS) GetStatus() uint32 {
|
||||
return p.RMStatus
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (p *UVM_UNSET_ACCESSED_BY_PARAMS) SetStatus(status uint32) {
|
||||
p.RMStatus = status
|
||||
}
|
||||
|
||||
// +marshal
|
||||
type UVM_MIGRATE_PARAMS struct {
|
||||
Base uint64
|
||||
Length uint64
|
||||
DestinationUUID NvUUID
|
||||
Flags uint32
|
||||
_ [4]byte
|
||||
SemaphoreAddress uint64
|
||||
SemaphorePayload uint32
|
||||
CPUNumaNode uint32
|
||||
UserSpaceStart uint64
|
||||
UserSpaceLength uint64
|
||||
RMStatus uint32
|
||||
_ [4]byte
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (p *UVM_MIGRATE_PARAMS) GetStatus() uint32 {
|
||||
return p.RMStatus
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (p *UVM_MIGRATE_PARAMS) SetStatus(status uint32) {
|
||||
p.RMStatus = status
|
||||
}
|
||||
|
||||
// UVM_MIGRATE_PARAMS_V550 is the updated version of
|
||||
// UVM_MIGRATE_PARAMS since 550.40.07.
|
||||
//
|
||||
// +marshal
|
||||
type UVM_MIGRATE_PARAMS_V550 struct {
|
||||
Base uint64
|
||||
Length uint64
|
||||
DestinationUUID NvUUID
|
||||
Flags uint32
|
||||
_ [4]byte
|
||||
SemaphoreAddress uint64
|
||||
SemaphorePayload uint32
|
||||
CPUNumaNode int32
|
||||
UserSpaceStart uint64
|
||||
UserSpaceLength uint64
|
||||
RMStatus uint32
|
||||
_ [4]byte
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (p *UVM_MIGRATE_PARAMS_V550) GetStatus() uint32 {
|
||||
return p.RMStatus
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (p *UVM_MIGRATE_PARAMS_V550) SetStatus(status uint32) {
|
||||
p.RMStatus = status
|
||||
}
|
||||
|
||||
// +marshal
|
||||
type UVM_MIGRATE_RANGE_GROUP_PARAMS struct {
|
||||
RangeGroupID uint64
|
||||
DestinationUUID NvUUID
|
||||
RMStatus uint32
|
||||
Pad0 [4]byte
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (p *UVM_MIGRATE_RANGE_GROUP_PARAMS) GetStatus() uint32 {
|
||||
return p.RMStatus
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (p *UVM_MIGRATE_RANGE_GROUP_PARAMS) SetStatus(status uint32) {
|
||||
p.RMStatus = status
|
||||
}
|
||||
|
||||
// +marshal
|
||||
type UVM_TOOLS_READ_PROCESS_MEMORY_PARAMS struct {
|
||||
Buffer uint64
|
||||
Size uint64
|
||||
TargetVA uint64
|
||||
BytesRead uint64
|
||||
RMStatus uint32
|
||||
Pad0 [4]byte
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (p *UVM_TOOLS_READ_PROCESS_MEMORY_PARAMS) GetStatus() uint32 {
|
||||
return p.RMStatus
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (p *UVM_TOOLS_READ_PROCESS_MEMORY_PARAMS) SetStatus(status uint32) {
|
||||
p.RMStatus = status
|
||||
}
|
||||
|
||||
// +marshal
|
||||
type UVM_TOOLS_WRITE_PROCESS_MEMORY_PARAMS struct {
|
||||
Buffer uint64
|
||||
Size uint64
|
||||
TargetVA uint64
|
||||
BytesWritten uint64
|
||||
RMStatus uint32
|
||||
Pad0 [4]byte
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (p *UVM_TOOLS_WRITE_PROCESS_MEMORY_PARAMS) GetStatus() uint32 {
|
||||
return p.RMStatus
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (p *UVM_TOOLS_WRITE_PROCESS_MEMORY_PARAMS) SetStatus(status uint32) {
|
||||
p.RMStatus = status
|
||||
}
|
||||
|
||||
// +marshal
|
||||
type UVM_MAP_DYNAMIC_PARALLELISM_REGION_PARAMS struct {
|
||||
Base uint64
|
||||
Length uint64
|
||||
GPUUUID NvUUID
|
||||
RMStatus uint32
|
||||
Pad0 [4]byte
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (p *UVM_MAP_DYNAMIC_PARALLELISM_REGION_PARAMS) GetStatus() uint32 {
|
||||
return p.RMStatus
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (p *UVM_MAP_DYNAMIC_PARALLELISM_REGION_PARAMS) SetStatus(status uint32) {
|
||||
p.RMStatus = status
|
||||
}
|
||||
|
||||
// +marshal
|
||||
type UVM_UNMAP_EXTERNAL_PARAMS struct {
|
||||
Base uint64
|
||||
Length uint64
|
||||
GPUUUID NvUUID
|
||||
RMStatus uint32
|
||||
Pad0 [4]byte
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (p *UVM_UNMAP_EXTERNAL_PARAMS) GetStatus() uint32 {
|
||||
return p.RMStatus
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (p *UVM_UNMAP_EXTERNAL_PARAMS) SetStatus(status uint32) {
|
||||
p.RMStatus = status
|
||||
}
|
||||
|
||||
// +marshal
|
||||
type UVM_ALLOC_SEMAPHORE_POOL_PARAMS struct {
|
||||
Base uint64
|
||||
Length uint64
|
||||
PerGPUAttributes [UVM_MAX_GPUS]UvmGpuMappingAttributes
|
||||
GPUAttributesCount uint64
|
||||
RMStatus uint32
|
||||
Pad0 [4]byte
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (p *UVM_ALLOC_SEMAPHORE_POOL_PARAMS) GetStatus() uint32 {
|
||||
return p.RMStatus
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (p *UVM_ALLOC_SEMAPHORE_POOL_PARAMS) SetStatus(status uint32) {
|
||||
p.RMStatus = status
|
||||
}
|
||||
|
||||
// +marshal
|
||||
type UVM_ALLOC_SEMAPHORE_POOL_PARAMS_V550 struct {
|
||||
Base uint64
|
||||
Length uint64
|
||||
PerGPUAttributes [UVM_MAX_GPUS_V2]UvmGpuMappingAttributes
|
||||
GPUAttributesCount uint64
|
||||
RMStatus uint32
|
||||
Pad0 [4]byte
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (p *UVM_ALLOC_SEMAPHORE_POOL_PARAMS_V550) GetStatus() uint32 {
|
||||
return p.RMStatus
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (p *UVM_ALLOC_SEMAPHORE_POOL_PARAMS_V550) SetStatus(status uint32) {
|
||||
p.RMStatus = status
|
||||
}
|
||||
|
||||
// +marshal
|
||||
type UVM_PAGEABLE_MEM_ACCESS_ON_GPU_PARAMS struct {
|
||||
GPUUUID NvUUID
|
||||
PageableMemAccess uint8
|
||||
Pad [3]byte
|
||||
RMStatus uint32
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (p *UVM_PAGEABLE_MEM_ACCESS_ON_GPU_PARAMS) GetStatus() uint32 {
|
||||
return p.RMStatus
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (p *UVM_PAGEABLE_MEM_ACCESS_ON_GPU_PARAMS) SetStatus(status uint32) {
|
||||
p.RMStatus = status
|
||||
}
|
||||
|
||||
// +marshal
|
||||
type UVM_VALIDATE_VA_RANGE_PARAMS struct {
|
||||
Base uint64
|
||||
Length uint64
|
||||
RMStatus uint32
|
||||
Pad0 [4]byte
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (p *UVM_VALIDATE_VA_RANGE_PARAMS) GetStatus() uint32 {
|
||||
return p.RMStatus
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (p *UVM_VALIDATE_VA_RANGE_PARAMS) SetStatus(status uint32) {
|
||||
p.RMStatus = status
|
||||
}
|
||||
|
||||
// +marshal
|
||||
type UVM_CREATE_EXTERNAL_RANGE_PARAMS struct {
|
||||
Base uint64
|
||||
Length uint64
|
||||
RMStatus uint32
|
||||
Pad0 [4]byte
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (p *UVM_CREATE_EXTERNAL_RANGE_PARAMS) GetStatus() uint32 {
|
||||
return p.RMStatus
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (p *UVM_CREATE_EXTERNAL_RANGE_PARAMS) SetStatus(status uint32) {
|
||||
p.RMStatus = status
|
||||
}
|
||||
|
||||
// +marshal
|
||||
type UVM_MM_INITIALIZE_PARAMS struct {
|
||||
UvmFD int32
|
||||
RMStatus uint32
|
||||
}
|
||||
|
||||
// GetStatus implements HasStatus.GetStatus.
|
||||
func (p *UVM_MM_INITIALIZE_PARAMS) GetStatus() uint32 {
|
||||
return p.RMStatus
|
||||
}
|
||||
|
||||
// SetStatus implements HasStatus.SetStatus.
|
||||
func (p *UVM_MM_INITIALIZE_PARAMS) SetStatus(status uint32) {
|
||||
p.RMStatus = status
|
||||
}
|
||||
|
||||
// From kernel-open/nvidia-uvm/uvm_types.h:
|
||||
|
||||
const (
|
||||
UVM_MAX_GPUS = NV_MAX_DEVICES
|
||||
UVM_MAX_GPUS_V2 = NV_MAX_DEVICES * NV_MAX_SUBDEVICES
|
||||
)
|
||||
|
||||
// +marshal
|
||||
type UvmGpuMappingAttributes struct {
|
||||
GPUUUID NvUUID
|
||||
GPUMappingType uint32
|
||||
GPUCachingType uint32
|
||||
GPUFormatType uint32
|
||||
GPUElementBits uint32
|
||||
GPUCompressionType uint32
|
||||
}
|
||||
Loading…
Add table
Add a link
Reference in a new issue