2c4ae3b0a4
Содержимое пина, зафиксированного в go.mod sing-box-lx, одним коммитом без истории. Полная история SagerNet/gvisor — 1.45 ГБ и клонируется в каждой CI-джобе; наша дельта — одна вставка в одну функцию, история для неё не нужна. Module path github.com/sagernet/gvisor сохранён намеренно: на него опирается replace-директива суперпроекта. Патч поверх — отдельным коммитом, чтобы дельта читалась одним git show и переносилась на новый пин копированием. SPECS/TASKS/048-GVISOR_HANDSHAKE_NIL_CRASH
147 lines
4.3 KiB
Go
147 lines
4.3 KiB
Go
// Copyright 2020 The gVisor Authors.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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//go:build arm64
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// +build arm64
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package cpuid
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const (
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// ARM64FeatureFP indicates support for single and double precision
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// float point types.
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ARM64FeatureFP Feature = iota
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// ARM64FeatureASIMD indicates support for Advanced SIMD with single
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// and double precision float point arithmetic.
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ARM64FeatureASIMD
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// ARM64FeatureEVTSTRM indicates support for the generic timer
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// configured to generate events at a frequency of approximately
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// 100KHz.
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ARM64FeatureEVTSTRM
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// ARM64FeatureAES indicates support for AES instructions
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// (AESE/AESD/AESMC/AESIMC).
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ARM64FeatureAES
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// ARM64FeaturePMULL indicates support for AES instructions
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// (PMULL/PMULL2).
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ARM64FeaturePMULL
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// ARM64FeatureSHA1 indicates support for SHA1 instructions
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// (SHA1C/SHA1P/SHA1M etc).
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ARM64FeatureSHA1
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// ARM64FeatureSHA2 indicates support for SHA2 instructions
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// (SHA256H/SHA256H2/SHA256SU0 etc).
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ARM64FeatureSHA2
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// ARM64FeatureCRC32 indicates support for CRC32 instructions
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// (CRC32B/CRC32H/CRC32W etc).
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ARM64FeatureCRC32
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// ARM64FeatureATOMICS indicates support for atomic instructions
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// (LDADD/LDCLR/LDEOR/LDSET etc).
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ARM64FeatureATOMICS
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// ARM64FeatureFPHP indicates support for half precision float point
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// arithmetic.
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ARM64FeatureFPHP
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// ARM64FeatureASIMDHP indicates support for ASIMD with half precision
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// float point arithmetic.
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ARM64FeatureASIMDHP
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// ARM64FeatureCPUID indicates support for EL0 access to certain ID
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// registers is available.
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ARM64FeatureCPUID
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// ARM64FeatureASIMDRDM indicates support for SQRDMLAH and SQRDMLSH
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// instructions.
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ARM64FeatureASIMDRDM
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// ARM64FeatureJSCVT indicates support for the FJCVTZS instruction.
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ARM64FeatureJSCVT
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// ARM64FeatureFCMA indicates support for the FCMLA and FCADD
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// instructions.
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ARM64FeatureFCMA
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// ARM64FeatureLRCPC indicates support for the LDAPRB/LDAPRH/LDAPR
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// instructions.
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ARM64FeatureLRCPC
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// ARM64FeatureDCPOP indicates support for DC instruction (DC CVAP).
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ARM64FeatureDCPOP
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// ARM64FeatureSHA3 indicates support for SHA3 instructions
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// (EOR3/RAX1/XAR/BCAX).
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ARM64FeatureSHA3
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// ARM64FeatureSM3 indicates support for SM3 instructions
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// (SM3SS1/SM3TT1A/SM3TT1B).
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ARM64FeatureSM3
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// ARM64FeatureSM4 indicates support for SM4 instructions
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// (SM4E/SM4EKEY).
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ARM64FeatureSM4
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// ARM64FeatureASIMDDP indicates support for dot product instructions
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// (UDOT/SDOT).
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ARM64FeatureASIMDDP
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// ARM64FeatureSHA512 indicates support for SHA2 instructions
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// (SHA512H/SHA512H2/SHA512SU0).
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ARM64FeatureSHA512
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// ARM64FeatureSVE indicates support for Scalable Vector Extension.
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ARM64FeatureSVE
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// ARM64FeatureASIMDFHM indicates support for FMLAL and FMLSL
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// instructions.
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ARM64FeatureASIMDFHM
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)
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var allFeatures = map[Feature]allFeatureInfo{
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ARM64FeatureFP: {"fp", true},
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ARM64FeatureASIMD: {"asimd", true},
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ARM64FeatureEVTSTRM: {"evtstrm", true},
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ARM64FeatureAES: {"aes", true},
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ARM64FeaturePMULL: {"pmull", true},
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ARM64FeatureSHA1: {"sha1", true},
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ARM64FeatureSHA2: {"sha2", true},
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ARM64FeatureCRC32: {"crc32", true},
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ARM64FeatureATOMICS: {"atomics", true},
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ARM64FeatureFPHP: {"fphp", true},
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ARM64FeatureASIMDHP: {"asimdhp", true},
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ARM64FeatureCPUID: {"cpuid", true},
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ARM64FeatureASIMDRDM: {"asimdrdm", true},
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ARM64FeatureJSCVT: {"jscvt", true},
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ARM64FeatureFCMA: {"fcma", true},
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ARM64FeatureLRCPC: {"lrcpc", true},
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ARM64FeatureDCPOP: {"dcpop", true},
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ARM64FeatureSHA3: {"sha3", true},
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ARM64FeatureSM3: {"sm3", true},
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ARM64FeatureSM4: {"sm4", true},
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ARM64FeatureASIMDDP: {"asimddp", true},
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ARM64FeatureSHA512: {"sha512", true},
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ARM64FeatureSVE: {"sve", true},
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ARM64FeatureASIMDFHM: {"asimdfhm", true},
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}
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func archFlagOrder(fn func(Feature)) {
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for i := 0; i < len(allFeatures); i++ {
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fn(Feature(i))
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}
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}
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