snapshot: sagernet/gvisor v0.0.0-20250811.0-sing-box-mod.1
Содержимое пина, зафиксированного в go.mod sing-box-lx, одним коммитом без истории. Полная история SagerNet/gvisor — 1.45 ГБ и клонируется в каждой CI-джобе; наша дельта — одна вставка в одну функцию, история для неё не нужна. Module path github.com/sagernet/gvisor сохранён намеренно: на него опирается replace-директива суперпроекта. Патч поверх — отдельным коммитом, чтобы дельта читалась одним git show и переносилась на новый пин копированием. SPECS/TASKS/048-GVISOR_HANDSHAKE_NIL_CRASH
This commit is contained in:
Leadaxe
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712 changed files with 185689 additions and 0 deletions
664
pkg/cpuid/features_amd64.go
Normal file
664
pkg/cpuid/features_amd64.go
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@ -0,0 +1,664 @@
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// Copyright 2019 The gVisor Authors.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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//go:build amd64
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// +build amd64
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package cpuid
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// block is a collection of 32 Feature bits.
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type block int
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// blockSize is the number of bits in a single block.
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const blockSize = 32
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// featureID returns the feature identified by the given block and bit.
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//
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// Feature bits are numbered according to "blocks". Each block is 32 bits, and
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// feature bits from the same source (cpuid leaf/level) are in the same block.
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func featureID(b block, bit int) Feature {
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return Feature(blockSize*int(b) + bit)
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}
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// block returns the block associated with the feature.
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func (f Feature) block() block {
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return block(f / blockSize)
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}
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// Bit returns the bit associated with the feature.
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func (f Feature) bit() uint32 {
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return uint32(1 << (f % blockSize))
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}
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// ChangeableSet is a feature set that can allows changes.
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type ChangeableSet interface {
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Query(in In) Out
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Set(in In, out Out)
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}
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// Set sets the given feature.
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func (f Feature) Set(s ChangeableSet) {
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f.set(s, true)
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}
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// Unset unsets the given feature.
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func (f Feature) Unset(s ChangeableSet) {
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f.set(s, false)
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}
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// set sets the given feature.
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func (f Feature) set(s ChangeableSet, on bool) {
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switch f.block() {
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case 0:
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out := s.Query(In{Eax: uint32(featureInfo)})
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if on {
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out.Ecx |= f.bit()
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} else {
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out.Ecx &^= f.bit()
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}
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s.Set(In{Eax: uint32(featureInfo)}, out)
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case 1:
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out := s.Query(In{Eax: uint32(featureInfo)})
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if on {
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out.Edx |= f.bit()
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} else {
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out.Edx &^= f.bit()
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}
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s.Set(In{Eax: uint32(featureInfo)}, out)
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case 2:
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out := s.Query(In{Eax: uint32(extendedFeatureInfo)})
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if on {
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out.Ebx |= f.bit()
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} else {
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out.Ebx &^= f.bit()
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}
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s.Set(In{Eax: uint32(extendedFeatureInfo)}, out)
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case 3:
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out := s.Query(In{Eax: uint32(extendedFeatureInfo)})
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if on {
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out.Ecx |= f.bit()
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} else {
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out.Ecx &^= f.bit()
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}
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s.Set(In{Eax: uint32(extendedFeatureInfo)}, out)
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case 4:
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// Need to turn on the bit in block 0.
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out := s.Query(In{Eax: uint32(featureInfo)})
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out.Ecx |= (1 << 26)
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s.Set(In{Eax: uint32(featureInfo)}, out)
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out = s.Query(In{Eax: xSaveInfoSub.eax(), Ecx: xSaveInfoSub.ecx()})
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if on {
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out.Eax |= f.bit()
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} else {
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out.Eax &^= f.bit()
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}
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s.Set(In{Eax: xSaveInfoSub.eax(), Ecx: xSaveInfoSub.ecx()}, out)
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case 5, 6:
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// Need to enable extended features.
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out := s.Query(In{Eax: uint32(extendedFunctionInfo)})
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if out.Eax < uint32(extendedFeatures) {
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out.Eax = uint32(extendedFeatures)
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}
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s.Set(In{Eax: uint32(extendedFunctionInfo)}, out)
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out = s.Query(In{Eax: uint32(extendedFeatures)})
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if f.block() == 5 {
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if on {
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out.Ecx |= f.bit()
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} else {
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out.Ecx &^= f.bit()
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}
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} else {
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if on {
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out.Edx |= f.bit()
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} else {
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out.Edx &^= f.bit()
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}
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}
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s.Set(In{Eax: uint32(extendedFeatures)}, out)
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case 7:
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out := s.Query(In{Eax: uint32(extendedFeatureInfo)})
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if on {
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out.Edx |= f.bit()
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} else {
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out.Edx &^= f.bit()
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}
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s.Set(In{Eax: uint32(extendedFeatureInfo)}, out)
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}
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}
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// check checks for the given feature.
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//
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//go:nosplit
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func (f Feature) check(fs FeatureSet) bool {
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switch f.block() {
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case 0:
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_, _, cx, _ := fs.query(featureInfo)
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return (cx & f.bit()) != 0
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case 1:
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_, _, _, dx := fs.query(featureInfo)
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return (dx & f.bit()) != 0
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case 2:
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_, bx, _, _ := fs.query(extendedFeatureInfo)
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return (bx & f.bit()) != 0
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case 3:
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_, _, cx, _ := fs.query(extendedFeatureInfo)
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return (cx & f.bit()) != 0
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case 4:
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// Need to check appropriate bit in block 0.
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_, _, cx, _ := fs.query(featureInfo)
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if (cx & (1 << 26)) == 0 {
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return false
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}
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ax, _, _, _ := fs.query(xSaveInfoSub)
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return (ax & f.bit()) != 0
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case 5, 6:
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// eax=0x80000000 gets supported extended levels. We use this
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// to determine if there are any non-zero block 4 or block 6
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// bits to find.
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ax, _, _, _ := fs.query(extendedFunctionInfo)
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if ax >= uint32(extendedFeatures) {
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_, _, cx, dx := fs.query(extendedFeatures)
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if f.block() == 5 {
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return (cx & f.bit()) != 0
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}
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// Ignore features duplicated from block 1 on AMD.
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// These bits are reserved on Intel.
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return ((dx &^ block6DuplicateMask) & f.bit()) != 0
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}
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return false
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case 7:
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_, _, _, dx := fs.query(extendedFeatureInfo)
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return (dx & f.bit()) != 0
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default:
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return false
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}
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}
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// Block 0 constants are all of the "basic" feature bits returned by a cpuid in
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// ecx with eax=1.
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const (
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X86FeatureSSE3 Feature = iota
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X86FeaturePCLMULDQ
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X86FeatureDTES64
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X86FeatureMONITOR
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X86FeatureDSCPL
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X86FeatureVMX
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X86FeatureSMX
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X86FeatureEST
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X86FeatureTM2
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X86FeatureSSSE3 // Not a typo, "supplemental" SSE3.
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X86FeatureCNXTID
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X86FeatureSDBG
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X86FeatureFMA
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X86FeatureCX16
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X86FeatureXTPR
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X86FeaturePDCM
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_ // ecx bit 16 is reserved.
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X86FeaturePCID
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X86FeatureDCA
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X86FeatureSSE4_1
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X86FeatureSSE4_2
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X86FeatureX2APIC
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X86FeatureMOVBE
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X86FeaturePOPCNT
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X86FeatureTSCD
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X86FeatureAES
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X86FeatureXSAVE
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X86FeatureOSXSAVE
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X86FeatureAVX
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X86FeatureF16C
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X86FeatureRDRAND
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X86FeatureHypervisor
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)
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// Block 1 constants are all of the "basic" feature bits returned by a cpuid in
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// edx with eax=1.
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const (
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X86FeatureFPU Feature = 32 + iota
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X86FeatureVME
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X86FeatureDE
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X86FeaturePSE
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X86FeatureTSC
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X86FeatureMSR
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X86FeaturePAE
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X86FeatureMCE
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X86FeatureCX8
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X86FeatureAPIC
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_ // edx bit 10 is reserved.
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X86FeatureSEP
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X86FeatureMTRR
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X86FeaturePGE
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X86FeatureMCA
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X86FeatureCMOV
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X86FeaturePAT
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X86FeaturePSE36
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X86FeaturePSN
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X86FeatureCLFSH
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_ // edx bit 20 is reserved.
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X86FeatureDS
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X86FeatureACPI
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X86FeatureMMX
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X86FeatureFXSR
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X86FeatureSSE
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X86FeatureSSE2
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X86FeatureSS
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X86FeatureHTT
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X86FeatureTM
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X86FeatureIA64
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X86FeaturePBE
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)
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// Block 2 bits are the "structured extended" features returned in ebx for
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// eax=7, ecx=0.
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const (
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X86FeatureFSGSBase Feature = 2*32 + iota
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X86FeatureTSC_ADJUST
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_ // ebx bit 2 is reserved.
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X86FeatureBMI1
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X86FeatureHLE
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X86FeatureAVX2
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X86FeatureFDP_EXCPTN_ONLY
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X86FeatureSMEP
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X86FeatureBMI2
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X86FeatureERMS
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X86FeatureINVPCID
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X86FeatureRTM
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X86FeatureCQM
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X86FeatureFPCSDS
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X86FeatureMPX
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X86FeatureRDT
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X86FeatureAVX512F
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X86FeatureAVX512DQ
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X86FeatureRDSEED
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X86FeatureADX
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X86FeatureSMAP
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X86FeatureAVX512IFMA
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X86FeaturePCOMMIT
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X86FeatureCLFLUSHOPT
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X86FeatureCLWB
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X86FeatureIPT // Intel processor trace.
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X86FeatureAVX512PF
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X86FeatureAVX512ER
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X86FeatureAVX512CD
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X86FeatureSHA
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X86FeatureAVX512BW
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X86FeatureAVX512VL
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)
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// Block 3 bits are the "extended" features returned in ecx for eax=7, ecx=0.
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const (
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X86FeaturePREFETCHWT1 Feature = 3*32 + iota
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X86FeatureAVX512VBMI
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X86FeatureUMIP
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X86FeaturePKU
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X86FeatureOSPKE
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X86FeatureWAITPKG
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X86FeatureAVX512_VBMI2
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X86FeatureCET_SS
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X86FeatureGFNI
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X86FeatureVAES
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X86FeatureVPCLMULQDQ
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X86FeatureAVX512_VNNI
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X86FeatureAVX512_BITALG
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X86FeatureTME
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X86FeatureAVX512_VPOPCNTDQ
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_ // ecx bit 15 is reserved
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X86FeatureLA57
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// ecx bits 17-21 are reserved
|
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_
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_
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_
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_
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_
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X86FeatureRDPID
|
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// ecx bits 23-24 are reserved
|
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_
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_
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X86FeatureCLDEMOTE
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_ // ecx bit 26 is reserved
|
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X86FeatureMOVDIRI
|
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X86FeatureMOVDIR64B
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)
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|
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// Block 4 constants are for xsave capabilities in CPUID.(EAX=0DH,ECX=01H):EAX.
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// The CPUID leaf is available only if 'X86FeatureXSAVE' is present.
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const (
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X86FeatureXSAVEOPT Feature = 4*32 + iota
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X86FeatureXSAVEC
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X86FeatureXGETBV1
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X86FeatureXSAVES
|
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// EAX[31:4] are reserved.
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)
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|
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// Block 5 constants are the extended feature bits in
|
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// CPUID.(EAX=0x80000001):ECX.
|
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const (
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X86FeatureLAHF64 Feature = 5*32 + iota
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||||
X86FeatureCMP_LEGACY
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X86FeatureSVM
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X86FeatureEXTAPIC
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X86FeatureCR8_LEGACY
|
||||
X86FeatureLZCNT
|
||||
X86FeatureSSE4A
|
||||
X86FeatureMISALIGNSSE
|
||||
X86FeaturePREFETCHW
|
||||
X86FeatureOSVW
|
||||
X86FeatureIBS
|
||||
X86FeatureXOP
|
||||
X86FeatureSKINIT
|
||||
X86FeatureWDT
|
||||
_ // ecx bit 14 is reserved.
|
||||
X86FeatureLWP
|
||||
X86FeatureFMA4
|
||||
X86FeatureTCE
|
||||
_ // ecx bit 18 is reserved.
|
||||
_ // ecx bit 19 is reserved.
|
||||
_ // ecx bit 20 is reserved.
|
||||
X86FeatureTBM
|
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X86FeatureTOPOLOGY
|
||||
X86FeaturePERFCTR_CORE
|
||||
X86FeaturePERFCTR_NB
|
||||
_ // ecx bit 25 is reserved.
|
||||
X86FeatureBPEXT
|
||||
X86FeaturePERFCTR_TSC
|
||||
X86FeaturePERFCTR_LLC
|
||||
X86FeatureMWAITX
|
||||
X86FeatureADMSKEXTN
|
||||
_ // ecx bit 31 is reserved.
|
||||
)
|
||||
|
||||
// Block 6 constants are the extended feature bits in
|
||||
// CPUID.(EAX=0x80000001):EDX.
|
||||
//
|
||||
// These are sparse, and so the bit positions are assigned manually.
|
||||
const (
|
||||
// On AMD, EDX[24:23] | EDX[17:12] | EDX[9:0] are duplicate features
|
||||
// also defined in block 1 (in identical bit positions). Those features
|
||||
// are not listed here.
|
||||
block6DuplicateMask = 0x183f3ff
|
||||
|
||||
X86FeatureSYSCALL Feature = 6*32 + 11
|
||||
X86FeatureNX Feature = 6*32 + 20
|
||||
X86FeatureMMXEXT Feature = 6*32 + 22
|
||||
X86FeatureFXSR_OPT Feature = 6*32 + 25
|
||||
X86FeatureGBPAGES Feature = 6*32 + 26
|
||||
X86FeatureRDTSCP Feature = 6*32 + 27
|
||||
X86FeatureLM Feature = 6*32 + 29
|
||||
X86Feature3DNOWEXT Feature = 6*32 + 30
|
||||
X86Feature3DNOW Feature = 6*32 + 31
|
||||
)
|
||||
|
||||
// Block 7 constants are the extended features bits in
|
||||
// CPUID.(EAX=07H,ECX=0):EDX.
|
||||
const (
|
||||
_ Feature = 7*32 + iota // edx bit 0 is reserved.
|
||||
_ // edx bit 1 is reserved.
|
||||
X86FeatureAVX512_4VNNIW
|
||||
X86FeatureAVX512_4FMAPS
|
||||
X86FeatureFSRM
|
||||
_ // edx bit 5 is not used in Linux.
|
||||
_ // edx bit 6 is reserved.
|
||||
_ // edx bit 7 is reserved.
|
||||
X86FeatureAVX512_VP2INTERSECT
|
||||
X86FeatureSRBDS_CTRL
|
||||
X86FeatureMD_CLEAR
|
||||
X86FeatureRTM_ALWAYS_ABORT
|
||||
_ // edx bit 12 is reserved.
|
||||
X86FeatureTSX_FORCE_ABORT
|
||||
X86FeatureSERIALIZE
|
||||
X86FeatureHYBRID_CPU
|
||||
X86FeatureTSXLDTRK
|
||||
_ // edx bit 17 is reserved.
|
||||
X86FeaturePCONFIG
|
||||
X86FeatureARCH_LBR
|
||||
X86FeatureIBT
|
||||
_ // edx bit 21 is reserved.
|
||||
X86FeatureAMX_BF16
|
||||
X86FeatureAVX512_FP16
|
||||
X86FeatureAMX_TILE
|
||||
X86FeatureAMX_INT8
|
||||
X86FeatureSPEC_CTRL
|
||||
X86FeatureINTEL_STIBP
|
||||
X86FeatureFLUSH_L1D
|
||||
X86FeatureARCH_CAPABILITIES
|
||||
X86FeatureCORE_CAPABILITIES
|
||||
X86FeatureSPEC_CTRL_SSBD
|
||||
)
|
||||
|
||||
// These are the extended floating point state features. They are used to
|
||||
// enumerate floating point features in XCR0, XSTATE_BV, etc.
|
||||
const (
|
||||
XSAVEFeatureX87 = 1 << 0
|
||||
XSAVEFeatureSSE = 1 << 1
|
||||
XSAVEFeatureAVX = 1 << 2
|
||||
XSAVEFeatureBNDREGS = 1 << 3
|
||||
XSAVEFeatureBNDCSR = 1 << 4
|
||||
XSAVEFeatureAVX512op = 1 << 5
|
||||
XSAVEFeatureAVX512zmm0 = 1 << 6
|
||||
XSAVEFeatureAVX512zmm16 = 1 << 7
|
||||
XSAVEFeaturePKRU = 1 << 9
|
||||
)
|
||||
|
||||
// allFeatures is the set of allFeatures.
|
||||
//
|
||||
// These match names used in arch/x86/kernel/cpu/capflags.c.
|
||||
var allFeatures = map[Feature]allFeatureInfo{
|
||||
// Block 0.
|
||||
X86FeatureSSE3: {"pni", true},
|
||||
X86FeaturePCLMULDQ: {"pclmulqdq", true},
|
||||
X86FeatureDTES64: {"dtes64", true},
|
||||
X86FeatureMONITOR: {"monitor", true},
|
||||
X86FeatureDSCPL: {"ds_cpl", true},
|
||||
X86FeatureVMX: {"vmx", true},
|
||||
X86FeatureSMX: {"smx", true},
|
||||
X86FeatureEST: {"est", true},
|
||||
X86FeatureTM2: {"tm2", true},
|
||||
X86FeatureSSSE3: {"ssse3", true},
|
||||
X86FeatureCNXTID: {"cid", true},
|
||||
X86FeatureSDBG: {"sdbg", true},
|
||||
X86FeatureFMA: {"fma", true},
|
||||
X86FeatureCX16: {"cx16", true},
|
||||
X86FeatureXTPR: {"xtpr", true},
|
||||
X86FeaturePDCM: {"pdcm", true},
|
||||
X86FeaturePCID: {"pcid", true},
|
||||
X86FeatureDCA: {"dca", true},
|
||||
X86FeatureSSE4_1: {"sse4_1", true},
|
||||
X86FeatureSSE4_2: {"sse4_2", true},
|
||||
X86FeatureX2APIC: {"x2apic", true},
|
||||
X86FeatureMOVBE: {"movbe", true},
|
||||
X86FeaturePOPCNT: {"popcnt", true},
|
||||
X86FeatureTSCD: {"tsc_deadline_timer", true},
|
||||
X86FeatureAES: {"aes", true},
|
||||
X86FeatureXSAVE: {"xsave", true},
|
||||
X86FeatureAVX: {"avx", true},
|
||||
X86FeatureF16C: {"f16c", true},
|
||||
X86FeatureRDRAND: {"rdrand", true},
|
||||
X86FeatureHypervisor: {"hypervisor", true},
|
||||
X86FeatureOSXSAVE: {"osxsave", false},
|
||||
|
||||
// Block 1.
|
||||
X86FeatureFPU: {"fpu", true},
|
||||
X86FeatureVME: {"vme", true},
|
||||
X86FeatureDE: {"de", true},
|
||||
X86FeaturePSE: {"pse", true},
|
||||
X86FeatureTSC: {"tsc", true},
|
||||
X86FeatureMSR: {"msr", true},
|
||||
X86FeaturePAE: {"pae", true},
|
||||
X86FeatureMCE: {"mce", true},
|
||||
X86FeatureCX8: {"cx8", true},
|
||||
X86FeatureAPIC: {"apic", true},
|
||||
X86FeatureSEP: {"sep", true},
|
||||
X86FeatureMTRR: {"mtrr", true},
|
||||
X86FeaturePGE: {"pge", true},
|
||||
X86FeatureMCA: {"mca", true},
|
||||
X86FeatureCMOV: {"cmov", true},
|
||||
X86FeaturePAT: {"pat", true},
|
||||
X86FeaturePSE36: {"pse36", true},
|
||||
X86FeaturePSN: {"pn", true},
|
||||
X86FeatureCLFSH: {"clflush", true},
|
||||
X86FeatureDS: {"dts", true},
|
||||
X86FeatureACPI: {"acpi", true},
|
||||
X86FeatureMMX: {"mmx", true},
|
||||
X86FeatureFXSR: {"fxsr", true},
|
||||
X86FeatureSSE: {"sse", true},
|
||||
X86FeatureSSE2: {"sse2", true},
|
||||
X86FeatureSS: {"ss", true},
|
||||
X86FeatureHTT: {"ht", true},
|
||||
X86FeatureTM: {"tm", true},
|
||||
X86FeatureIA64: {"ia64", true},
|
||||
X86FeaturePBE: {"pbe", true},
|
||||
|
||||
// Block 2.
|
||||
X86FeatureFSGSBase: {"fsgsbase", true},
|
||||
X86FeatureTSC_ADJUST: {"tsc_adjust", true},
|
||||
X86FeatureBMI1: {"bmi1", true},
|
||||
X86FeatureHLE: {"hle", true},
|
||||
X86FeatureAVX2: {"avx2", true},
|
||||
X86FeatureSMEP: {"smep", true},
|
||||
X86FeatureBMI2: {"bmi2", true},
|
||||
X86FeatureERMS: {"erms", true},
|
||||
X86FeatureINVPCID: {"invpcid", true},
|
||||
X86FeatureRTM: {"rtm", true},
|
||||
X86FeatureCQM: {"cqm", true},
|
||||
X86FeatureMPX: {"mpx", true},
|
||||
X86FeatureRDT: {"rdt_a", true},
|
||||
X86FeatureAVX512F: {"avx512f", true},
|
||||
X86FeatureAVX512DQ: {"avx512dq", true},
|
||||
X86FeatureRDSEED: {"rdseed", true},
|
||||
X86FeatureADX: {"adx", true},
|
||||
X86FeatureSMAP: {"smap", true},
|
||||
X86FeatureCLWB: {"clwb", true},
|
||||
X86FeatureAVX512PF: {"avx512pf", true},
|
||||
X86FeatureAVX512ER: {"avx512er", true},
|
||||
X86FeatureAVX512CD: {"avx512cd", true},
|
||||
X86FeatureSHA: {"sha_ni", true},
|
||||
X86FeatureAVX512BW: {"avx512bw", true},
|
||||
X86FeatureAVX512VL: {"avx512vl", true},
|
||||
X86FeatureFDP_EXCPTN_ONLY: {"fdp_excptn_only", false},
|
||||
X86FeatureFPCSDS: {"fpcsds", false},
|
||||
X86FeatureIPT: {"ipt", false},
|
||||
X86FeatureCLFLUSHOPT: {"clfushopt", false},
|
||||
|
||||
// Block 3.
|
||||
X86FeatureAVX512VBMI: {"avx512vbmi", true},
|
||||
X86FeatureUMIP: {"umip", true},
|
||||
X86FeaturePKU: {"pku", true},
|
||||
X86FeatureOSPKE: {"ospke", true},
|
||||
X86FeatureWAITPKG: {"waitpkg", true},
|
||||
X86FeatureAVX512_VBMI2: {"avx512_vbmi2", true},
|
||||
X86FeatureGFNI: {"gfni", true},
|
||||
X86FeatureCET_SS: {"cet_ss", false},
|
||||
X86FeatureVAES: {"vaes", true},
|
||||
X86FeatureVPCLMULQDQ: {"vpclmulqdq", true},
|
||||
X86FeatureAVX512_VNNI: {"avx512_vnni", true},
|
||||
X86FeatureAVX512_BITALG: {"avx512_bitalg", true},
|
||||
X86FeatureTME: {"tme", true},
|
||||
X86FeatureAVX512_VPOPCNTDQ: {"avx512_vpopcntdq", true},
|
||||
X86FeatureLA57: {"la57", true},
|
||||
X86FeatureRDPID: {"rdpid", true},
|
||||
X86FeatureCLDEMOTE: {"cldemote", true},
|
||||
X86FeatureMOVDIRI: {"movdiri", true},
|
||||
X86FeatureMOVDIR64B: {"movdir64b", true},
|
||||
X86FeaturePREFETCHWT1: {"prefetchwt1", false},
|
||||
|
||||
// Block 4.
|
||||
X86FeatureXSAVEOPT: {"xsaveopt", true},
|
||||
X86FeatureXSAVEC: {"xsavec", true},
|
||||
X86FeatureXGETBV1: {"xgetbv1", true},
|
||||
X86FeatureXSAVES: {"xsaves", true},
|
||||
|
||||
// Block 5.
|
||||
X86FeatureLAHF64: {"lahf_lm", true}, // LAHF/SAHF in long mode.
|
||||
X86FeatureCMP_LEGACY: {"cmp_legacy", true},
|
||||
X86FeatureSVM: {"svm", true},
|
||||
X86FeatureEXTAPIC: {"extapic", true},
|
||||
X86FeatureCR8_LEGACY: {"cr8_legacy", true},
|
||||
X86FeatureLZCNT: {"abm", true}, // Advanced bit manipulation.
|
||||
X86FeatureSSE4A: {"sse4a", true},
|
||||
X86FeatureMISALIGNSSE: {"misalignsse", true},
|
||||
X86FeaturePREFETCHW: {"3dnowprefetch", true},
|
||||
X86FeatureOSVW: {"osvw", true},
|
||||
X86FeatureIBS: {"ibs", true},
|
||||
X86FeatureXOP: {"xop", true},
|
||||
X86FeatureSKINIT: {"skinit", true},
|
||||
X86FeatureWDT: {"wdt", true},
|
||||
X86FeatureLWP: {"lwp", true},
|
||||
X86FeatureFMA4: {"fma4", true},
|
||||
X86FeatureTCE: {"tce", true},
|
||||
X86FeatureTBM: {"tbm", true},
|
||||
X86FeatureTOPOLOGY: {"topoext", true},
|
||||
X86FeaturePERFCTR_CORE: {"perfctr_core", true},
|
||||
X86FeaturePERFCTR_NB: {"perfctr_nb", true},
|
||||
X86FeatureBPEXT: {"bpext", true},
|
||||
X86FeaturePERFCTR_TSC: {"ptsc", true},
|
||||
X86FeaturePERFCTR_LLC: {"perfctr_llc", true},
|
||||
X86FeatureMWAITX: {"mwaitx", true},
|
||||
X86FeatureADMSKEXTN: {"ad_mask_extn", false},
|
||||
|
||||
// Block 6.
|
||||
X86FeatureSYSCALL: {"syscall", true},
|
||||
X86FeatureNX: {"nx", true},
|
||||
X86FeatureMMXEXT: {"mmxext", true},
|
||||
X86FeatureFXSR_OPT: {"fxsr_opt", true},
|
||||
X86FeatureGBPAGES: {"pdpe1gb", true},
|
||||
X86FeatureRDTSCP: {"rdtscp", true},
|
||||
X86FeatureLM: {"lm", true},
|
||||
X86Feature3DNOWEXT: {"3dnowext", true},
|
||||
X86Feature3DNOW: {"3dnow", true},
|
||||
|
||||
// Block 7.
|
||||
X86FeatureAVX512_4VNNIW: {"avx512_4vnniw", true},
|
||||
X86FeatureAVX512_4FMAPS: {"avx512_4fmaps", true},
|
||||
X86FeatureFSRM: {"fsrm", true},
|
||||
X86FeatureAVX512_VP2INTERSECT: {"avx512_vp2intersect", true},
|
||||
X86FeatureSRBDS_CTRL: {"srbds_ctrl", false},
|
||||
X86FeatureMD_CLEAR: {"md_clear", true},
|
||||
X86FeatureRTM_ALWAYS_ABORT: {"rtm_always_abort", false},
|
||||
X86FeatureTSX_FORCE_ABORT: {"tsx_force_abort", false},
|
||||
X86FeatureSERIALIZE: {"serialize", true},
|
||||
X86FeatureHYBRID_CPU: {"hybrid_cpu", false},
|
||||
X86FeatureTSXLDTRK: {"tsxldtrk", true},
|
||||
X86FeaturePCONFIG: {"pconfig", true},
|
||||
X86FeatureARCH_LBR: {"arch_lbr", true},
|
||||
X86FeatureIBT: {"ibt", true},
|
||||
X86FeatureAMX_BF16: {"amx_bf16", true},
|
||||
X86FeatureAVX512_FP16: {"avx512_fp16", true},
|
||||
X86FeatureAMX_TILE: {"amx_tile", true},
|
||||
X86FeatureAMX_INT8: {"amx_int8", true},
|
||||
X86FeatureSPEC_CTRL: {"spec_ctrl", false},
|
||||
X86FeatureINTEL_STIBP: {"intel_stibp", false},
|
||||
X86FeatureFLUSH_L1D: {"flush_l1d", true},
|
||||
X86FeatureARCH_CAPABILITIES: {"arch_capabilities", true},
|
||||
X86FeatureCORE_CAPABILITIES: {"core_capabilities", false},
|
||||
X86FeatureSPEC_CTRL_SSBD: {"spec_ctrl_ssbd", false},
|
||||
}
|
||||
|
||||
// linuxBlockOrder defines the order in which linux organizes the feature
|
||||
// blocks. Linux also tracks feature bits in 32-bit blocks, but in an order
|
||||
// which doesn't match well here, so for the /proc/cpuinfo generation we simply
|
||||
// re-map the blocks to Linux's ordering and then go through the bits in each
|
||||
// block.
|
||||
var linuxBlockOrder = []block{1, 6, 0, 5, 2, 4, 3, 7}
|
||||
|
||||
func archFlagOrder(fn func(Feature)) {
|
||||
for _, b := range linuxBlockOrder {
|
||||
for i := 0; i < blockSize; i++ {
|
||||
f := featureID(b, i)
|
||||
if _, ok := allFeatures[f]; ok {
|
||||
fn(f)
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
Loading…
Add table
Add a link
Reference in a new issue